GP1020 Datasheet, PDF (39/44 Pages) Zarlink Semiconductor Inc – SIX-CHANNEL PARALLEL CORRELATOR CIRCUIT FOR GPS OR GLONASS RECEIVERS

TABLE OF ACCESSIBLE CHANNEL INTERNAL NODES
CNTL PIN: TMS1: LOW
CNTL PIN: SIGN9 LOW
HIGH
LOW
LOW
HIGH
LOW
HIGH
O/P pin
IN PHASE I & Q ACCUMULATOR ARM
Prompt Dithering Prompt Dithering
SIGN 2
bit 13
13
12
12
MAG 2
bit 11
11
5
5
SIGN 3
bit 10
10
4
4
MAG 3
bit 9
9
3
3
SIGN4
bit 8
8
2
2
MAG 4
bit 7
7
1
1
SIGN 5
bit 6
6
0
0
QUAD-PHASE I & Q ACCUMULATOR ARM
Prompt Dithering Prompt Dithering
MAG 5
bit 13
13
12
12
SIGN 6
bit 11
11
5
5
MAG 6
bit 10
10
4
4
SIGN 7
bit 9
9
3
3
MAG 7
bit 8
8
2
2
SIGN 8
bit 7
7
1
1
MAG 8
bit 6
6
0
0
MAG 9
Dump
Dump
Dump
Dump
MIX_CORREL output
In Phase ARM
Quad Phase ARM
Prompt Dithering Prompt Dithering
TCK3
bit 0
0
0
0
TCK4
bit 1
1
1
1
TCK5
bit 2
2
2
2
TCK6
bit 3
3
3
3
CNTL PIN: TMS1:
CNTL PIN: SIGN9
LOW
X
HIGH
X
TDO1
TDO2
TDO3
TDO4
TDO5
TDO6
TDO7
CodeCLK
Prompt C/A code
Preset load
TIC
CARR DCO O/P bit 27
1ms epoch carry
STATUS latch control
Code CLK
Dithering C/A code
CARR DCO O/P bit 25
CARR DCO O/P bit 26
CARR DCO O/P bit 27
1ms epoch carry
STATUS latch control
CNTL PIN: TMS1:
X
CNTL PIN: SIGN9
X
TCK1
TCK2
TCK7
Sampled SIGN
Sampled MAG
RESCODEGEN
GP1020
39