GP1020 Datasheet, PDF(27/44 Page) Zarlink Semiconductor Inc – SIX-CHANNEL PARALLEL CORRELATOR CIRCUIT FOR GPS OR GLONASS RECEIVERS

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GP1020 Datasheet, PDF (27/44 Pages) Zarlink Semiconductor Inc – SIX-CHANNEL PARALLEL CORRELATOR CIRCUIT FOR GPS OR GLONASS RECEIVERS

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PROP_DELAY_LO is a 16-bit register containing the 16 less

significant bits of an unsigned integer PROP_DELAY whose

value is the number, minus one, of 50 nanosecond intervals

completed since the MARK output signal was generated.

PROP_DELAY_HI is a 5-bit register containing the 5 more

significant bits of the same integer. This integer comes from the

Mark Output programmable down counter and the

DOWN_COUNT register as detailed below. If a read access is

performed when the programmable down counter is working the

data may be not stable. A MARK_FB_ACK status bit should be

acknowledged before performing a read access to the

PROP_DELAY registers.

The programmable down counter operates as follows:

Time Counter contents

Remarks

DOWN_COUNT The counter is loaded by

Software with DOWN_COUNT

value.

The one second time mark

signal is issued and prop-

agates through the output

driver. The Down counter wraps

round and continues to count

down.

PROP_DELAY When the feedback signal at

input pin MARK FB1, MARK

FB2, MARK FB3 or Internal TIC

signal, as selected by bits

7 to 5 of the TIMER_CNTL

counter, its value is frozen

and can be read by the

processor, (16 lower bits only)

To get the correct number of 50 ns intervals, 1 should be

added to the PROP_DELAY number. For example, if the feed-

back was so fast that the counter did not have time to count, the

PROP_DELAY value will be 1F FFFFH and by adding 1 the result

becomes 00 0000H.

Other examples of delay counts:

PROP_DELAY value

Real number of

50 ns intervals

00 0000H

00 0001H

1F FFFCH

2,097,150

If there is no feedback coming from the external driver, a time-

out function will stop the counter and no MARK_FB_ACK status

bit will be asserted. The PROP_DELAY value will be 1F FFFDH

(representing a propagation delay of 104.8575 ms).

The PROP_DELAY value can be used for:

1. Computation of DOWN_COUNT, to compensate for the

propagation delay in the output driver circuit if this delay

islarger than 50 nanoseconds.

2. As a BITE function, to check that the TIME_MARK output

drivers work or to verify the TIC period.

GP1020

RESET_CNTL Read/Write Address C0H

Bit

Description

MRB (Chip MASTERRESET)

CH1_RSTB

CH2_RSTB

CH3_RSTB

CH4_RSTB

CH5_RSTB

CH6_RSTB

7 to 15

Not used

BIT DESCRIPTION

CHx_RSTB: When active LOW, the reset bit inhibits propa-

gation of the clock phases to the tracking channel and resets the

code generator, accumulated and measurement flags,

CODE_DCO and CARRIER_DCO accumulators and their as-

sociated INCR registers, the I&D accumulators, the code slew

counter and finally the code phase counter. This is required for

the search algorithm of one satellite signal using many channels

in order to start from a known relative code phase on all the

channels. However, all of the registers in CHx can be pro-

grammed and read as usual. To restart normal operation in the

different channels at the same time, the corresponding

CHx_RSTB bits should be set to HIGH during the same write

operation. All CHx_RSTB are set LOW by a master reset.

MRB: When LOW (software reset), the effect is identical to

the hardware MASTERRESET except that the clock generator

and the time base generator are not affected. It should be set to

HIGH to allow access to the different registers. MRB is set HIGH

by a hardware master reset.

RTC_DELAY Read Address C2H

Bit

Description

15 to 0

Number of clock intervals counted from

the occurrence of an RTC interrupt and

the next TIC (TIC IN if the external source

is selected).

Each count represents 2.275 microsecond.

The register content is unsigned and

the validity range is from 0 to TIC

period/2.275 microsecond.

The error in RTC_DELAY is 6 2.275 microsecond as shown

in Fig. 16.

RTC_DELAY is latched on a TIC and is overwrite protected

by its own measurement data overwrite protection mechanism.

The RTC_TIC_ACK status bit of MEAS_STATUS_A register

indicates if an RTC interrupt has been received. The

RTC_TIC_ACK status bit is cleared by writing to the

ALL_MEAS_RST address and also by reading RTC_DELAY

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