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W90N745CD Datasheet, PDF (55/422 Pages) Winbond – 16/32-bit ARM microcontroller | |||
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W90N745CD/W90N745CDG
EXTAL
FIN
Input Divider
INDV1[4:0]
(NR)
PLL1
PFD
Charge
Pump
VCO
Output
Divider 480MHz
(NO) FOUT
to Audio Controller
FBDV1[8:0]
Feedback
Divider
(NF)
OTDV1[1:0]
Figure 6.2.11 Audio PLL block diagram
The formula of output clock of PLL is:
FOUT = FIN â NF â 1
NR NO
FOUTï¼Output clock of Output Divider
FINï¼External clock into the Input Divider
NRï¼Input divider value (NR = INDV1 + 2)
NFï¼Feedback divider value (NF = FBDV1 + 2)
NOï¼Output divider value (NO = OTDV1)
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