W90N745CD Datasheet, PDF (48/422 Pages) Winbond – 16/32-bit ARM microcontroller

W90N745CD/W90N745CDG
Arbitration Control Register (ARBCON)
REGISTER ADDRESS
ARBCON _{0xFFF0_0004}
R/W
DESCRIPTION
R/W ^{Arbitration Control Register}
31
30
29
28
27
26
23
22
21
RESERVED
20
19
18
15
14
13
RESERVED
12
11
10
7
6
5
RESERVED
4
3
2
RESERVED
IPACT
RESET VALUE
0x0000_0000
25
24
17
16
9
8
1
IPEN
0
PRTMOD
BITS
[31:3]
[2]
[1]
[0]
RESERVED
IPACT
IPEN
PRTMOD
DESCRIPTION
-
Interrupt priority active.
When IPEN=”1”, this bit will be set when the ARM core has an
unmasked interrupt request. This bit is available only when the
PRTMOD=0.
Interrupt priority enable bit
0 = the ARM core has the lowest priority.
1 = enable to raise the ARM core priority to second
This bit is available only when the PRTMOD=0.
Priority mode select
0 = Fixed Priority Mode (default)
1 = Rotate Priority Mode
Publication Release Date: September 22, 2006
- 43 -
Revision A2