W90N745CD Datasheet, PDF (50/422 Pages) Winbond – 16/32-bit ARM microcontroller

W90N745CD/W90N745CDG
EXTAL
INDV[4:0]
FIN
Input Divider
(NR)
PFD
Charge
Pump
PLL
VCO
Output _480MHz
Divider
(NO) ^FOUT
FBDV[8:0]
Feedback
Divider
(NF)
OTDV[1:0]
USBCKS
GP0
1
48MHz
Gen
0
USB
Module
Clock
0
Divider
&
1
Selector
ECLKS
CLKS[2:0]
Internal
System
Clock
Figure 6.2.10 System PLL block diagram
The formula of output clock of PLL is:
FOUT = FIN ∗ ^NF ∗ ¹
NR NO
FOUT：Output clock of Output Divider
FIN：External clock into the Input Divider
NR：Input divider value (NR = INDV + 2)
NF：Feedback divider value (NF = FBDV + 2)
NO：Output divider value (NO = OTDV)
Publication Release Date: September 22, 2006
- 45 -
Revision A2