W90N745CD Datasheet, PDF (292/422 Pages) Winbond – 16/32-bit ARM microcontroller

W90N745CD/W90N745CDG
HSUART Time Out Register (HSUART_TOR)
REGISTER OFFSET R/W
HSUART_TOR 0x1C _R/W
DESCRIPTION
Time Out Register
31
30
29
23
22
21
15
14
13
7
6
5
TOIE
28
27
26
Reserved
20
19
18
Reserved
12
11
10
Reserved
4
3
2
TOIC
RESET VALUE
0x0000_0000
25
24
17
16
9
8
1
0
BITS
[31:8]
[7]
[6:0]
DESCRIPTIONS
Reserved -
TOIE
Time Out Interrupt Enable
The feature of receiver time out interrupt is enabled only when TOR [7] =
IER[0] = 1.
TOIC
Time Out Interrupt Comparator
The time out counter resets and starts counting (the counting clock = baud
rate) whenever the RX FIFO receives a new data word. Once the content
of time out counter (TOUT_CNT) is equal to that of time out interrupt
comparator (TOIC), a receiver time out interrupt (Irpt_TOUT) is generated if
TOR [7] = IER [0] = 1. A new incoming data word or RX FIFO empty clears
Irpt_TOUT.
Publication Release Date: September 22, 2006
- 287 -
Revision A2