W90N745CD Datasheet, PDF (249/422 Pages) Winbond – 16/32-bit ARM microcontroller

W90N745CD/W90N745CDG
31
30
29
28 27
26
25
24
Reserved
23
22
21
20 19
18
17
16
Reserved
15
14
13
12 11
10
9
8
Reserved
7
6
5
4
3
2
1
0
Reserved
P_FIFO_EMPTY P_DMA_END_IRQ P_DMA_MIDDLE_IRQ
BITS
[31:3]
[2]
[1]
[0]
DESCRIPTIONS
Reserved
-
P_FIFO_EMPTY
Playback FIFO empty indicator bit
P_FIFO_EMPTY=0, the playback FIFO is not empty
P_FIFO_EMPTY=1, the playback FIFO is empty
The P_FIFO_EMPTY bit is read only
P_DMA_END_IRQ
DMA end address interrupt request bit for playback
P_DMA_END_IRQ=0, means playback DMA address does not
reach the end address
P_DMA_END_IRQ=1, means playback DMA address reach the
end address
The P_DMA_END_IRQ bit is readable, and only can be clear
by write “1” to this bit
DMA address interrupt request bit for playback
P_DMA_MIDDLE_IRQ
P_DMA_MIDDLE_IRQ=0, means playback DMA address does
not reach the middle address
P_DMA_MIDDLE_IRQ=1, means playback DMA address reach
the middle address
The P_DMA_MIDDLE_IRQ bit is readable, and only can be
clear by write “1” to this bit
I²S control register (ACTL_I²SCON)
REGISTER
ACTL_I²SCON
ADDRESS R/W
DESCRIPTION
0xFFF0_9028 R/W I²S control register
The ACTL_I²SCON is the I²S basic operation control register.
RESET VALUE
0x0000_0000
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