W90N745CD Datasheet, PDF (350/422 Pages) Winbond – 16/32-bit ARM microcontroller

W90N745CD/W90N745CDG
I²C Command Register 0/1 (I²C_CMDR 0/1)
REGISTER
I²C_CMDR0
I²C_CMDR1
ADDRESS R/W
DESCRIPTION
0xFFF8_6008 R/W I²C Command Register 0
0xFFF8_6108 R/W I²C Command Register 1
RESET VALUE
0x0000_0000
0x0000_0000
31
30
29
28
27
Reserved
23
22
21
20
19
Reserved
15
14
13
12
11
Reserved
7
6
5
4
3
Reserved
START
NOTE: Software can write this register only when I²C_EN = 1.
STOP
26
25
18
17
10
9
2
READ
1
WRITE
24
16
8
0
ACK
BITS
DESCRIPTIONS
[31:5]
Reserved _Reserved
[4]
START
Generate Start Condition
Generate (repeated) start condition on I²C bus.
[3]
STOP
Generate Stop Condition
Generate stop condition on I²C bus.
[2]
READ
Read Data From Slave
Retrieve data from slave.
[1]
WRITE
Write Data To Slave
Transmit data to slave.
Send Acknowledge To Slave
[0]
ACK
When I²C behaves as a receiver, sent ACK (ACK = ‘0’) or NACK (ACK
= ‘1’) to slave.
NOTE: The START, STOP, READ and WRITE bits are cleared automatically while transfer finished. READ and WRITE cannot
be set concurrently.
Publication Release Date: September 22, 2006
- 345 -
Revision A2