W90N745CD Datasheet, PDF (238/422 Pages) Winbond – 16/32-bit ARM microcontroller

W90N745CD/W90N745CDG
The signal format is shown as Figure 6.9.4
Frame (48 KHz)
SYN
BCL
DIN
Tag phase
12.288 MHz
.
.
Data phase
.
.
.
.
.
.
.
.
.
.
DOU
.
.
.
.
.
.
B255 B0 B1
B15 B16 B35 B36 B55 B56 B75 B76 B95 B96 B255
Slot 0
MS
LS
Slot 1
Slot 2
Slot 3
Slot 4 Slot 5 –12
Figure 6.9.4 The signal format of AC-link
The structure of output frame is shown as below:
SLOT #
0
1
2
3
4
5 6 7 8 9 10 11 12
CMD CMD PCM PCM
CONTENT Tag
ADDR DATA LEFT RIGHT
Unused
BITS
PHASE
15-0
Tag
phase
19-0
19-0
19-0
19-0
Data phase
159 - 0
The output frame data format is shown as following:
SLOT #
BIT
DESCRIPTION
15 Frame validity bit, 1 is valid, 0 is invalid.
Tag
(slot 0)
14 - 3
Slot validity, but in W90N745, only bits 6-3 are used, bits 14-7 are
unused. Bit 3 is corresponding to slot 1, bit 4 is corresponding to slot
2, etc.. 1 is valid, 0 is invalid. The unused bits 14-7 should be cleared
to 0.
2 - 0 This field should be cleared to 0.
CMD ADDR
(slot 1)
19
18-12
11 - 0
Read/write control, 1 for read and 0 for write
Control register address
This field should be cleared to 0
Publication Release Date: September 22, 2006
- 233 -
Revision A2