W90N745CD Datasheet, PDF (243/422 Pages) Winbond – 16/32-bit ARM microcontroller

W90N745CD/W90N745CDG
Continued.
BITS
[13:12]
[8]
[7]
[6]
[5]
[1]
[0]
PLAY_SINGLE
[1:0]
AC_RECORD
AC_PLAY
I²S_RECORD
I²S_PLAY
AC_RESET
I²S_RESET
DESCRIPTIONS
Playback single/dual channel select bits
PLAY_SINGLE[1:0]=11, the playback is in stereo mode
PLAY_SINGLE[1:0]=10, the playback is in mono mode
PLAY_SINGLE[1:0]= 00 & 01 is reserved
The PLAY_SINGLE[1:0] bits are read/write
AC link record control bit
AC_RECORD=0, the record path of AC link is disable
AC_RECORD=1, the record path of AC link is enable
The AC_RECORD bit is read/write
AC link playback control bit
AC_PLAY=0, the playback path of AC link is disable
AC_PLAY=1, the playback path of AC link is enable
The AC_PLAY bit is read/write
I²S record control bit
I²S_RECORD=0, the record path of I²S is disable
I²S_RECORD=1, the record path of I²S is enable
The I²S_RECORD bit is read/write
I²S playback control bit
I²S_PLAY=0, the playback path of I²S is disable
I²S_PLAY=1, the playback path of I²S is enable
The I²S_PLAY bit is read/write
AC link sub block RESET control bit
AC_RESET=0, release the AC link function block from reset
mode
AC_RESET=1, force the AC link function block to reset mode
The AC_RESET bit is read/write
I²S sub block RESET control bit
I²S_RESET=0, release the I²S function block from reset
mode
I²S_RESET=1, force the I²S function block to reset mode
The I²S_RESET bit is read/write
DMA record destination base address (ACTL_RDSTB)
REGISTER
ACTL_RDSTB
ADDRESS R/W
DESCRIPTION
0xFFF0_9008 R/W DMA record destination base address
RESET VALUE
0x0000_0000
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