LM3S1621 Datasheet, PDF (922/947 Pages) Texas Instruments – ARM and Thumb are registered trademarks and Cortex is a trademark

Register Quick Reference
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
GPIOPeriphID2, type RO, offset 0xFE8, reset 0x0000.0018 (see page 446)
GPIOPeriphID3, type RO, offset 0xFEC, reset 0x0000.0001 (see page 447)
PID2
GPIOPCellID0, type RO, offset 0xFF0, reset 0x0000.000D (see page 448)
PID3
GPIOPCellID1, type RO, offset 0xFF4, reset 0x0000.00F0 (see page 449)
CID0
GPIOPCellID2, type RO, offset 0xFF8, reset 0x0000.0005 (see page 450)
CID1
GPIOPCellID3, type RO, offset 0xFFC, reset 0x0000.00B1 (see page 451)
CID2
External Peripheral Interface (EPI)
Base 0x400D.0000
EPICFG, type R/W, offset 0x000, reset 0x0000.0000 (see page 484)
CID3
BLKEN
MODE
EPIBAUD, type R/W, offset 0x004, reset 0x0000.0000 (see page 485)
COUNT1
COUNT0
EPISDRAMCFG, type R/W, offset 0x010, reset 0x82EE.0000 (see page 487)
FREQ
RFSH
SLEEP
EPIHB8CFG, type R/W, offset 0x010, reset 0x0000.FF00 (see page 489)
XFFEN XFEEN WRHIGH RDHIGH
MAXWAIT
WRWS
RDWS
EPIHB16CFG, type R/W, offset 0x010, reset 0x0000.FF00 (see page 492)
XFFEN XFEEN WRHIGH RDHIGH
MAXWAIT
WRWS
RDWS
BSEL
EPIGPCFG, type R/W, offset 0x010, reset 0x0000.0000 (see page 496)
CLKPIN CLKGATE
RDYEN FRMPIN FRM50
FRMCNT
RW
WR2CYC RD2CYC
MAXWAIT
ASIZE
EPIHB8CFG2, type R/W, offset 0x014, reset 0x0000.0000 (see page 501)
WORD
CSBAUD
CSCFG
SIZE
MODE
MODE
DSIZE
EPIHB16CFG2, type R/W, offset 0x014, reset 0x0000.0000 (see page 503)
WORD
CSBAUD
CSCFG
EPIGPCFG2, type R/W, offset 0x014, reset 0x0000.0000 (see page 505)
WORD
EPIADDRMAP, type R/W, offset 0x01C, reset 0x0000.0000 (see page 506)
EPIRSIZE0, type R/W, offset 0x020, reset 0x0000.0003 (see page 508)
EPSZ
EPADR
ERSZ
ERADR
SIZE
922
January 21, 2012
Texas Instruments-Production Data