LM3S1621 Datasheet, PDF (682/947 Pages) Texas Instruments – ARM and Thumb are registered trademarks and Cortex is a trademark

Universal Asynchronous Receivers/Transmitters (UARTs)
14.5
To use the UART, the peripheral clock must be enabled by setting the appropriate bit in the RCGC1
register (page 252). In addition, the clock to the appropriate GPIO module must be enabled via the
RCGC2 register (page 261) in the System Control module. To find out which GPIO port to enable,
refer to Table 19-5 on page 851.
This section discusses the steps that are required to use a UART module. For this example, the
UART clock is assumed to be 20 MHz, and the desired UART configuration is:
■ 115200 baud rate
■ Data length of 8 bits
■ One stop bit
■ No parity
■ FIFOs disabled
■ No interrupts
The first thing to consider when programming the UART is the baud-rate divisor (BRD), because
the UARTIBRD and UARTFBRD registers must be written before the UARTLCRH register. Using
the equation described in “Baud-Rate Generation” on page 674, the BRD can be calculated:
BRD = 20,000,000 / (16 * 115,200) = 10.8507
which means that the DIVINT field of the UARTIBRD register (see page 694) should be set to 10
decimal or 0xA. The value to be loaded into the UARTFBRD register (see page 695) is calculated
by the equation:
UARTFBRD[DIVFRAC] = integer(0.8507 * 64 + 0.5) = 54
With the BRD values in hand, the UART configuration is written to the module in the following order:
1. Disable the UART by clearing the UARTEN bit in the UARTCTL register.
2. Write the integer portion of the BRD to the UARTIBRD register.
3. Write the fractional portion of the BRD to the UARTFBRD register.
4. Write the desired serial parameters to the UARTLCRH register (in this case, a value of
0x0000.0060).
5. Optionally, configure the µDMA channel (see “Micro Direct Memory Access (μDMA)” on page 338)
and enable the DMA option(s) in the UARTDMACTL register.
6. Enable the UART by setting the UARTEN bit in the UARTCTL register.
Register Map
Table 14-4 on page 683 lists the UART registers. The offset listed is a hexadecimal increment to the
register’s address, relative to that UART’s base address:
■ UART0: 0x4000.C000
■ UART1: 0x4000.D000
■ UART2: 0x4000.E000
682
January 21, 2012
Texas Instruments-Production Data