LM3S1621 Datasheet, PDF (22/947 Pages) Texas Instruments – ARM and Thumb are registered trademarks and Cortex is a trademark

Table of Contents
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GPIO Interrupt Event (GPIOIEV), offset 0x40C ................................................................ 414
GPIO Interrupt Mask (GPIOIM), offset 0x410 ................................................................... 415
GPIO Raw Interrupt Status (GPIORIS), offset 0x414 ........................................................ 416
GPIO Masked Interrupt Status (GPIOMIS), offset 0x418 ................................................... 417
GPIO Interrupt Clear (GPIOICR), offset 0x41C ................................................................ 419
GPIO Alternate Function Select (GPIOAFSEL), offset 0x420 ............................................ 420
GPIO 2-mA Drive Select (GPIODR2R), offset 0x500 ........................................................ 422
GPIO 4-mA Drive Select (GPIODR4R), offset 0x504 ........................................................ 423
GPIO 8-mA Drive Select (GPIODR8R), offset 0x508 ........................................................ 424
GPIO Open Drain Select (GPIOODR), offset 0x50C ......................................................... 425
GPIO Pull-Up Select (GPIOPUR), offset 0x510 ................................................................ 426
GPIO Pull-Down Select (GPIOPDR), offset 0x514 ........................................................... 428
GPIO Slew Rate Control Select (GPIOSLR), offset 0x518 ................................................ 430
GPIO Digital Enable (GPIODEN), offset 0x51C ................................................................ 431
GPIO Lock (GPIOLOCK), offset 0x520 ............................................................................ 433
GPIO Commit (GPIOCR), offset 0x524 ............................................................................ 434
GPIO Analog Mode Select (GPIOAMSEL), offset 0x528 ................................................... 436
GPIO Port Control (GPIOPCTL), offset 0x52C ................................................................. 438
GPIO Peripheral Identification 4 (GPIOPeriphID4), offset 0xFD0 ....................................... 440
GPIO Peripheral Identification 5 (GPIOPeriphID5), offset 0xFD4 ....................................... 441
GPIO Peripheral Identification 6 (GPIOPeriphID6), offset 0xFD8 ....................................... 442
GPIO Peripheral Identification 7 (GPIOPeriphID7), offset 0xFDC ...................................... 443
GPIO Peripheral Identification 0 (GPIOPeriphID0), offset 0xFE0 ....................................... 444
GPIO Peripheral Identification 1 (GPIOPeriphID1), offset 0xFE4 ....................................... 445
GPIO Peripheral Identification 2 (GPIOPeriphID2), offset 0xFE8 ....................................... 446
GPIO Peripheral Identification 3 (GPIOPeriphID3), offset 0xFEC ...................................... 447
GPIO PrimeCell Identification 0 (GPIOPCellID0), offset 0xFF0 .......................................... 448
GPIO PrimeCell Identification 1 (GPIOPCellID1), offset 0xFF4 .......................................... 449
GPIO PrimeCell Identification 2 (GPIOPCellID2), offset 0xFF8 .......................................... 450
GPIO PrimeCell Identification 3 (GPIOPCellID3), offset 0xFFC ......................................... 451
External Peripheral Interface (EPI) ............................................................................................. 452
Register 1: EPI Configuration (EPICFG), offset 0x000 ....................................................................... 484
Register 2: EPI Main Baud Rate (EPIBAUD), offset 0x004 ................................................................. 485
Register 3: EPI SDRAM Configuration (EPISDRAMCFG), offset 0x010 .............................................. 487
Register 4: EPI Host-Bus 8 Configuration (EPIHB8CFG), offset 0x010 ............................................... 489
Register 5: EPI Host-Bus 16 Configuration (EPIHB16CFG), offset 0x010 ........................................... 492
Register 6: EPI General-Purpose Configuration (EPIGPCFG), offset 0x010 ........................................ 496
Register 7: EPI Host-Bus 8 Configuration 2 (EPIHB8CFG2), offset 0x014 .......................................... 501
Register 8: EPI Host-Bus 16 Configuration 2 (EPIHB16CFG2), offset 0x014 ....................................... 503
Register 9: EPI General-Purpose Configuration 2 (EPIGPCFG2), offset 0x014 ................................... 505
Register 10: EPI Address Map (EPIADDRMAP), offset 0x01C ............................................................. 506
Register 11: EPI Read Size 0 (EPIRSIZE0), offset 0x020 .................................................................... 508
Register 12: EPI Read Size 1 (EPIRSIZE1), offset 0x030 .................................................................... 508
Register 13: EPI Read Address 0 (EPIRADDR0), offset 0x024 ............................................................ 509
Register 14: EPI Read Address 1 (EPIRADDR1), offset 0x034 ............................................................ 509
Register 15: EPI Non-Blocking Read Data 0 (EPIRPSTD0), offset 0x028 ............................................. 510
Register 16: EPI Non-Blocking Read Data 1 (EPIRPSTD1), offset 0x038 ............................................. 510
Register 17: EPI Status (EPISTAT), offset 0x060 ................................................................................ 512
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January 21, 2012
Texas Instruments-Production Data