LM3S1621 Datasheet, PDF (761/947 Pages) Texas Instruments – ARM and Thumb are registered trademarks and Cortex is a trademark

Stellaris^® LM3S1621 Microcontroller
Bit/Field
0
Name
RORMIS
Type
RO
Reset
0
Description
SSI Receive Overrun Masked Interrupt Status
Value Description
0 An interrupt has not occurred or is masked.
1 An unmasked interrupt was signaled due to the receive FIFO
overflowing.
This bit is cleared when a 1 is written to the RORIC bit in the SSI
Interrupt Clear (SSIICR) register.
January 21, 2012
761
Texas Instruments-Production Data