LM3S1621 Datasheet, PDF (23/947 Pages) Texas Instruments – ARM and Thumb are registered trademarks and Cortex is a trademark

Stellaris^® LM3S1621 Microcontroller
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Register 31:
Register 32:
EPI Read FIFO Count (EPIRFIFOCNT), offset 0x06C ...................................................... 514
EPI Read FIFO (EPIREADFIFO), offset 0x070 ................................................................ 515
EPI Read FIFO Alias 1 (EPIREADFIFO1), offset 0x074 .................................................... 515
EPI Read FIFO Alias 2 (EPIREADFIFO2), offset 0x078 .................................................... 515
EPI Read FIFO Alias 3 (EPIREADFIFO3), offset 0x07C ................................................... 515
EPI Read FIFO Alias 4 (EPIREADFIFO4), offset 0x080 .................................................... 515
EPI Read FIFO Alias 5 (EPIREADFIFO5), offset 0x084 .................................................... 515
EPI Read FIFO Alias 6 (EPIREADFIFO6), offset 0x088 .................................................... 515
EPI Read FIFO Alias 7 (EPIREADFIFO7), offset 0x08C ................................................... 515
EPI FIFO Level Selects (EPIFIFOLVL), offset 0x200 ........................................................ 516
EPI Write FIFO Count (EPIWFIFOCNT), offset 0x204 ...................................................... 518
EPI Interrupt Mask (EPIIM), offset 0x210 ......................................................................... 519
EPI Raw Interrupt Status (EPIRIS), offset 0x214 .............................................................. 520
EPI Masked Interrupt Status (EPIMIS), offset 0x218 ........................................................ 522
EPI Error and Interrupt Status and Clear (EPIEISC), offset 0x21C .................................... 523
General-Purpose Timers ............................................................................................................. 525
Register 1: GPTM Configuration (GPTMCFG), offset 0x000 .............................................................. 542
Register 2: GPTM Timer A Mode (GPTMTAMR), offset 0x004 ........................................................... 543
Register 3: GPTM Timer B Mode (GPTMTBMR), offset 0x008 ........................................................... 545
Register 4: GPTM Control (GPTMCTL), offset 0x00C ........................................................................ 547
Register 5: GPTM Interrupt Mask (GPTMIMR), offset 0x018 .............................................................. 550
Register 6: GPTM Raw Interrupt Status (GPTMRIS), offset 0x01C ..................................................... 552
Register 7: GPTM Masked Interrupt Status (GPTMMIS), offset 0x020 ................................................ 555
Register 8: GPTM Interrupt Clear (GPTMICR), offset 0x024 .............................................................. 558
Register 9: GPTM Timer A Interval Load (GPTMTAILR), offset 0x028 ................................................ 560
Register 10: GPTM Timer B Interval Load (GPTMTBILR), offset 0x02C ................................................ 561
Register 11: GPTM Timer A Match (GPTMTAMATCHR), offset 0x030 .................................................. 562
Register 12: GPTM Timer B Match (GPTMTBMATCHR), offset 0x034 ................................................. 563
Register 13: GPTM Timer A Prescale (GPTMTAPR), offset 0x038 ....................................................... 564
Register 14: GPTM Timer B Prescale (GPTMTBPR), offset 0x03C ...................................................... 565
Register 15: GPTM TimerA Prescale Match (GPTMTAPMR), offset 0x040 ........................................... 566
Register 16: GPTM TimerB Prescale Match (GPTMTBPMR), offset 0x044 ........................................... 567
Register 17: GPTM Timer A (GPTMTAR), offset 0x048 ....................................................................... 568
Register 18: GPTM Timer B (GPTMTBR), offset 0x04C ....................................................................... 569
Register 19: GPTM Timer A Value (GPTMTAV), offset 0x050 ............................................................... 570
Register 20: GPTM Timer B Value (GPTMTBV), offset 0x054 .............................................................. 571
Watchdog Timers ......................................................................................................................... 572
Register 1: Watchdog Load (WDTLOAD), offset 0x000 ...................................................................... 576
Register 2: Watchdog Value (WDTVALUE), offset 0x004 ................................................................... 577
Register 3: Watchdog Control (WDTCTL), offset 0x008 ..................................................................... 578
Register 4: Watchdog Interrupt Clear (WDTICR), offset 0x00C .......................................................... 580
Register 5: Watchdog Raw Interrupt Status (WDTRIS), offset 0x010 .................................................. 581
Register 6: Watchdog Masked Interrupt Status (WDTMIS), offset 0x014 ............................................. 582
Register 7: Watchdog Test (WDTTEST), offset 0x418 ....................................................................... 583
Register 8: Watchdog Lock (WDTLOCK), offset 0xC00 ..................................................................... 584
Register 9: Watchdog Peripheral Identification 4 (WDTPeriphID4), offset 0xFD0 ................................. 585
Register 10: Watchdog Peripheral Identification 5 (WDTPeriphID5), offset 0xFD4 ................................. 586
Register 11: Watchdog Peripheral Identification 6 (WDTPeriphID6), offset 0xFD8 ................................. 587
January 21, 2012
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