LM3S1621 Datasheet, PDF (281/947 Pages) Texas Instruments – ARM and Thumb are registered trademarks and Cortex is a trademark

Stellaris^® LM3S1621 Microcontroller
6.3.11
6.4
6.4.1
Upon either external wake-up or RTC match, the Hibernation module delays coming out of hibernation
until V_DD is above the minimum specified voltage, see Table 21-2 on page 886.
When the Hibernation module wakes, the microcontroller performs a normal power-on reset. Note
that this reset does not reset the Hibernation module, but does reset the rest of the microcontroller.
Software can detect that the power-on was due to a wake from hibernation by examining the raw
interrupt status register (see “Interrupts and Status” on page 281) and by looking for state data in
the battery-backed memory (see “Battery-Backed Memory” on page 280).
Interrupts and Status
The Hibernation module can generate interrupts when the following conditions occur:
■ Assertion of WAKE pin
■ RTC match
■ Low battery detected
All of the interrupts are ORed together before being sent to the interrupt controller, so the Hibernate
module can only generate a single interrupt request to the controller at any given time. The software
interrupt handler can service multiple interrupt events by reading the Hibernation Masked Interrupt
Status (HIBMIS) register. Software can also read the status of the Hibernation module at any time
by reading the HIBRIS register which shows all of the pending events. This register can be used
after waking from hibernation to see if the wake condition was caused by the WAKE signal or the
RTC match.
The events that can trigger an interrupt are configured by setting the appropriate bits in the
Hibernation Interrupt Mask (HIBIM) register. Pending interrupts can be cleared by writing the
corresponding bit in the Hibernation Interrupt Clear (HIBIC) register.
Initialization and Configuration
The Hibernation module has several different configurations. The following sections show the
recommended programming sequence for various scenarios. The examples below assume that a
32.768-kHz oscillator is used, and thus always set the CLKSEL bit of the HIBCTL register. If a
4.194304-MHz crystal is used instead, then the CLKSEL bit remains cleared. Because the Hibernation
module runs at 32.768 kHz and is asynchronous to the rest of the microcontroller, which is run off
the system clock, software must allow a delay of t_{HIB_REG_ACCESS} after writes to certain registers
(see “Register Access Timing” on page 276). The registers that require a delay are listed in a note
in “Register Map” on page 283 as well as in each register description.
Initialization
The Hibernation module comes out of reset with the system clock enabled to the module, but if the
system clock to the module has been disabled, then it must be re-enabled, even if the RTC feature
is not used. See page 246.
If a 4.194304-MHz crystal is used as the Hibernation module clock source, perform the following
step:
1. Write 0x40 to the HIBCTL register at offset 0x10 to enable the crystal and select the divide-by-128
input path.
If a 32.678-kHz single-ended oscillator is used as the Hibernation module clock source, then perform
the following steps:
January 21, 2012
281
Texas Instruments-Production Data