LM3S1621 Datasheet, PDF (310/947 Pages) Texas Instruments – ARM and Thumb are registered trademarks and Cortex is a trademark

Internal Memory
Table 7-3. Flash Register Map (continued)
Offset Name
Type
Reset
Description
0x200 FMPRE0
0x134 FMPPE0
0x400 FMPPE0
0x1D0 BOOTCFG
0x1E0 USER_REG0
0x1E4 USER_REG1
0x1E8 USER_REG2
0x1EC USER_REG3
0x204 FMPRE1
0x208 FMPRE2
0x20C FMPRE3
0x404 FMPPE1
0x408 FMPPE2
0x40C FMPPE3
R/W
0xFFFF.FFFF Flash Memory Protection Read Enable 0
R/W
0xFFFF.FFFF Flash Memory Protection Program Enable 0
R/W
0xFFFF.FFFF Flash Memory Protection Program Enable 0
R/W
0xFFFF.FFFE Boot Configuration
R/W
0xFFFF.FFFF User Register 0
R/W
0xFFFF.FFFF User Register 1
R/W
0xFFFF.FFFF User Register 2
R/W
0xFFFF.FFFF User Register 3
R/W
0xFFFF.FFFF Flash Memory Protection Read Enable 1
R/W
0x0000.0000 Flash Memory Protection Read Enable 2
R/W
0x0000.0000 Flash Memory Protection Read Enable 3
R/W
0xFFFF.FFFF Flash Memory Protection Program Enable 1
R/W
0x0000.0000 Flash Memory Protection Program Enable 2
R/W
0x0000.0000 Flash Memory Protection Program Enable 3
See
page
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7.4 Flash Memory Register Descriptions (Flash Control Offset)
This section lists and describes the Flash Memory registers, in numerical order by address offset.
Registers in this section are relative to the Flash control base address of 0x400F.D000.
310
January 21, 2012
Texas Instruments-Production Data