MSP430FR5729 Datasheet, PDF (90/115 Pages) Texas Instruments – MSP430FR572x Mixed-Signal Microcontrollers

MSP430FR5729, MSP430FR5728, MSP430FR5727, MSP430FR5726, MSP430FR5725
MSP430FR5724, MSP430FR5723, MSP430FR5722, MSP430FR5721, MSP430FR5720
SLASE35A – MAY 2014 – REVISED JUNE 2014
www.ti.com
To XT1 XOUT
PJSEL0.4
XT1BYPASS
PJREN.5
PJDIR.5
00
01
10
11
PJOUT.5
DVSS
DVSS
DVSS
PJSEL0.5
PJSEL1.5
PJIN.5
To modules
00
01
10
11
EN
D
Pad Logic
Direction
0: Input
1: Output
DVSS
0
DVCC
1
1
Bus
Keeper
PJ.5/XOUT
Table 7-14. Port PJ (PJ.4 and PJ.5) Pin Functions
PIN NAME (P7.x)
x
FUNCTION
PJDIR.x
CONTROL BITS/SIGNALS ⁽¹⁾
PJSEL1.5 PJSEL0.5 PJSEL1.4 PJSEL0.4
XT1
BYPASS
PJ.4/XIN
4 PJ.4 (I/O)
I: 0; O: 1
X
X
0
0
X
XIN crystal mode ⁽²⁾
X
X
X
0
1
0
XIN bypass mode ⁽²⁾
X
X
X
0
1
1
PJ.5/XOUT
5 PJ.5 (I/O)
I: 0; O: 1
0
0
0
0
X
XOUT crystal mode
(3)
X
X
X
0
1
0
PJ.5 (I/O) ⁽⁴⁾
I: 0; O: 1
X
X
0
1
1
(1) X = Don't care
(2) Setting PJSEL1.4 = 0 and PJSEL0.4 = 1 causes the general-purpose I/O to be disabled. When XT1BYPASS = 0, PJ.4 and PJ.5 are
configured for crystal operation and PJSEL1.5 and PJSEL0.5 are do not care. When XT1BYPASS = 1, PJ.4 is configured for bypass
operation and PJ.5 is configured as general-purpose I/O.
(3) Setting PJSEL1.4 = 0 and PJSEL0.4 = 1 causes the general-purpose I/O to be disabled. When XT1BYPASS = 0, PJ.4 and PJ.5 are
configured for crystal operation and PJSEL1.5 and PJSEL0.5 are do not care. When XT1BYPASS = 1, PJ.4 is configured for bypass
operation and PJ.5 is configured as general-purpose I/O.
(4) When PJ.4 is configured in bypass mode, PJ.5 is configured as general-purpose I/O.
90
Input/Output Schematics
Copyright © 2014, Texas Instruments Incorporated
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MSP430FR5724 MSP430FR5723 MSP430FR5722 MSP430FR5721 MSP430FR5720