MSP430FR5729 Datasheet, PDF (78/115 Pages) Texas Instruments – MSP430FR572x Mixed-Signal Microcontrollers

MSP430FR5729, MSP430FR5728, MSP430FR5727, MSP430FR5726, MSP430FR5725
MSP430FR5724, MSP430FR5723, MSP430FR5722, MSP430FR5721, MSP430FR5720
SLASE35A – MAY 2014 – REVISED JUNE 2014
7.6 Port P2, P2.5 to P2.6, Input/Output With Schmitt Trigger
Pad Logic
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P2REN.x
P2DIR.x
00
01
From module 2
10
11
P2OUT.x
From module 1
From module 2
DVSS
P2SEL0.x
P2SEL1.x
P2IN.x
To modules
00
01
10
11
EN
D
Direction
0: Input
1: Output
DVSS
0
DVCC
1
1
Bus
Keeper
P2.5/TB0.0/UCA1TXD/UCA1SIMO
P2.6/TB1.0/UCA1RXD/UCA1SOMI
Table 7-6. Port P2 (P2.5 to P2.6) Pin Functions
PIN NAME (P2.x)
x
FUNCTION
P2.5/TB0.0/UCA1TXD/UCA1SIMO
P2.6/TB1.0/UCA1RXD/UCA1SOMI
5 P2.5(I/O) ⁽¹⁾
TB0.CCI0B ⁽¹⁾
TB0.0 ⁽¹⁾
UCA1TXD/UCA1SIMO ⁽¹⁾
6 P2.6(I/O) ⁽¹⁾
TB1.CCI0B ⁽¹⁾
TB1.0 ⁽¹⁾
UCA1RXD/UCA1SOMI ⁽¹⁾
(1) Not available on all devices and package types.
(2) Direction controlled by eUSCI_A1 module.
CONTROL BITS/SIGNALS
P2DIR.x P2SEL1.x P2SEL0.x
I: 0; O: 1
0
0
0
0
1
1
X ⁽²⁾
1
0
I: 0; O: 1
0
0
0
0
1
1
X ⁽²⁾
1
0
78
Input/Output Schematics
Copyright © 2014, Texas Instruments Incorporated
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MSP430FR5724 MSP430FR5723 MSP430FR5722 MSP430FR5721 MSP430FR5720