MSP430FR5729 Datasheet, PDF (6/115 Pages) Texas Instruments – MSP430FR572x Mixed-Signal Microcontrollers

MSP430FR5729, MSP430FR5728, MSP430FR5727, MSP430FR5726, MSP430FR5725
MSP430FR5724, MSP430FR5723, MSP430FR5722, MSP430FR5721, MSP430FR5720
SLASE35A – MAY 2014 – REVISED JUNE 2014
www.ti.com
4 Terminal Configuration and Functions
4.1 Pin Diagram – RHA Package –
MSP430FR5721, MSP430FR5723, MSP430FR5725, MSP430FR5727, MSP430FR5729
Figure 4-1 shows the pin diagram for the MSP430FR5721, MSP430FR5723, MSP430FR5725,
MSP430FR5727, and MSP430FR5729 devices in the 40-pin RHA package.
RHA PACKAGE
(TOP VIEW)
AVSS
PJ.4/XIN
PJ.5/XOUT
AVSS
AVCC
P2.4/TA1.0/UCA1CLK/A7*/CD11
P2.3/TA0.0/UCA1STE/A6*/CD10
P2.7
DVCC
DVSS
P1.0/TA0.1/DMAE0/RTCCLK/A0*/CD0/VeREF-* 1
P1.1/TA0.2/TA1CLK/CDOUT/A1*/CD1/VeREF+* ²
P1.2/TA1.1/TA0CLK/CDOUT/A2*/CD2 ³
P3.0/A12*/CD12 ⁴
P3.1/A13*/CD13 ⁵
P3.2/A14*/CD14 ⁶
P3.3/A15*/CD15 ⁷
P1.3/TA1.2/UCB0STE/A3*/CD3 ⁸
P1.4/TB0.1/UCA0STE/A4*/CD4 9
P1.5/TB0.2/UCA0CLK/A5*/CD5 ¹⁰
30 _VCORE
29 P1.7/TB1.2/UCB0SOMI/UCB0SCL/TA1.0
28 P1.6/TB1.1/UCB0SIMO/UCB0SDA/TA0.0
27 P3.7/TB2.2
26 _{P3.6/TB2.1/TB1CLK}
25 _{P3.5/TB1.2/CDOUT}
24 _{P3.4/TB1.1/TB2CLK/SMCLK}
23 P2.2/TB2.2/UCB0CLK/TB1.0
22 P2.1/TB2.1/UCA0RXD/UCA0SOMI/TB0.0
21 P2.0/TB2.0/UCA0TXD/UCA0SIMO/TB0CLK/ACLK
PJ.0/TDO/TB0OUTH/SMCLK/CD6
PJ.1/TDI/TCLK/TB1OUTH/MCLK/CD7
PJ.2/TMS/TB2OUTH/ACLK/CD8
PJ.3/TCK/CD9
P4.0/TB2.0
* Not available on MSP430FR5727, MSP430FR5723
Note: Exposed thermal pad connection to V_SS recommended.
RST/NMI/SBWTDIO
TEST/SBWTCK
P2.6/TB1.0/UCA1RXD/UCA1SOMI
P2.5/TB0.0/UCA1TXD/UCA1SIMO
P4.1
Figure 4-1. 40-Pin RHA Package (Top View)
6
Terminal Configuration and Functions
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Product Folder Links: MSP430FR5729 MSP430FR5728 MSP430FR5727 MSP430FR5726 MSP430FR5725
MSP430FR5724 MSP430FR5723 MSP430FR5722 MSP430FR5721 MSP430FR5720