MSP430FR5729 Datasheet, PDF (73/115 Pages) Texas Instruments – MSP430FR572x Mixed-Signal Microcontrollers

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MSP430FR5729, MSP430FR5728, MSP430FR5727, MSP430FR5726, MSP430FR5725
MSP430FR5724, MSP430FR5723, MSP430FR5722, MSP430FR5721, MSP430FR5720
SLASE35A – MAY 2014 – REVISED JUNE 2014
Table 7-2. Port P1 (P1.3 to P1.5) Pin Functions
PIN NAME (P1.x)
x
FUNCTION
CONTROL BITS/SIGNALS
P1DIR.x P1SEL1.x P1SEL0.x
P1.3/TA1.2/UCB0STE/A3/CD3
3 P1.3 (I/O)
I: 0; O: 1
0
0
TA1.CCI2A
TA1.2
UCB0STE
A3 ^{(2) (3)}
CD3 ^{(2) (4)}
0
0
1
1
X ⁽¹⁾
1
0
X
1
1
P1.4/TB0.1/UCA0STE/A4/CD4
4 P1.4 (I/O)
I: 0; O: 1
0
0
TB0.CCI1A
TB0.1
UCA0STE
A4 ^{(2) (3)}
CD4 ^{(2) (4)}
0
0
1
1
X ⁽⁵⁾
1
0
X
1
1
P1.5/TB0.2/UCA0CLK/A5/CD5
5 P1.5(I/O)
I: 0; O: 1
0
0
TB0.CCI2A
TB0.2
UCA0CLK
A5 ^{(2) (3)}
CD5 ^{(2) (4)}
0
0
1
1
X ⁽⁵⁾
1
0
X
1
1
(1) Direction controlled by eUSCI_B0 module.
(2) Setting P1SEL1.x and P1SEL0.x disables the output driver and the input Schmitt trigger to prevent parasitic cross currents when
applying analog signals.
(3) Not available on all devices and package types.
(4) Setting the CDPD.x bit of the comparator disables the output driver and the input Schmitt trigger to prevent parasitic cross currents
when applying analog signals. Selecting the CDx input pin to the comparator multiplexer with the CDx bits automatically disables output
driver and input buffer for that pin, regardless of the state of the associated CDPD.x bit
(5) Direction controlled by eUSCI_A0 module.
Copyright © 2014, Texas Instruments Incorporated
Input/Output Schematics
73
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