LM3S5D56 Datasheet, PDF (899/1146 Pages) Texas Instruments – Stellaris® LM3S5D56 Microcontroller

Stellaris^® LM3S5D56 Microcontroller
OTG B / Device Mode
USB Receive Control and Status Endpoint 1 Low (USBRXCSRL1)
Base 0x4005.0000
Offset 0x116
Type R/W, reset 0x00
7
6
5
4
3
2
1
0
CLRDT STALLED STALL FLUSH DATAERR OVER FULL RXRDY
Type W1C
R/W
R/W
R/W
RO
R/W
RO
R/W
Reset
0
0
0
0
0
0
0
0
Bit/Field
7
6
5
4
Name
CLRDT
STALLED
STALL
FLUSH
Type
W1C
R/W
R/W
R/W
Reset
0
0
0
0
Description
Clear Data Toggle
Writing a 1 to this bit clears the DT bit in the USBRXCSRHn register.
Endpoint Stalled
Value Description
0 A STALL handshake has not been transmitted.
1 A STALL handshake has been transmitted.
Software must clear this bit.
Send STALL
Value Description
0 No effect.
1 Issues a STALL handshake.
Software must clear this bit to terminate the STALL condition.
Note: This bit has no effect where the endpoint is being used for
isochronous transfers.
Flush FIFO
Value Description
0 No effect.
1 Flushes the next packet from the endpoint receive FIFO. The
FIFO pointer is reset and the RXRDY bit is cleared.
The CPU writes a 1 to this bit to flush the next packet to be read from
the endpoint receive FIFO. The FIFO pointer is reset and the RXRDY bit
is cleared. Note that if the FIFO is double-buffered, FLUSH may have
to be set twice to completely clear the FIFO.
Important: ^{This bit should only be set when the RXRDY bit is set. At}
other times, it may cause data to be corrupted.
January 23, 2012
899
Texas Instruments-Production Data