LM3S5D56 Datasheet, PDF (13/1146 Pages) Texas Instruments – Stellaris® LM3S5D56 Microcontroller

Stellaris^® LM3S5D56 Microcontroller
Figure 18-1. Analog Comparator Module Block Diagram ......................................................... 941
Figure 18-2. Structure of Comparator Unit .............................................................................. 943
Figure 18-3. Comparator Internal Reference Structure ............................................................ 943
Figure 19-1. PWM Module Diagram ....................................................................................... 955
Figure 19-2. PWM Generator Block Diagram .......................................................................... 955
Figure 19-3. PWM Count-Down Mode .................................................................................... 957
Figure 19-4. PWM Count-Up/Down Mode .............................................................................. 958
Figure 19-5. PWM Generation Example In Count-Up/Down Mode ........................................... 958
Figure 19-6. PWM Dead-Band Generator ............................................................................... 959
Figure 20-1. QEI Block Diagram .......................................................................................... 1025
Figure 20-2. Quadrature Encoder and Velocity Predivider Operation ...................................... 1027
Figure 21-1. 64-Pin LQFP Package Pin Diagram .................................................................. 1046
Figure 24-1. Load Conditions ............................................................................................... 1073
Figure 24-2. JTAG Test Clock Input Timing ........................................................................... 1074
Figure 24-3. JTAG Test Access Port (TAP) Timing ................................................................ 1074
Figure 24-4. Power-On Reset Timing ................................................................................... 1075
Figure 24-5. Brown-Out Reset Timing .................................................................................. 1075
Figure 24-6. Power-On Reset and Voltage Parameters ......................................................... 1076
Figure 24-7. External Reset Timing (RST) ............................................................................ 1076
Figure 24-8. Software Reset Timing ..................................................................................... 1076
Figure 24-9. Watchdog Reset Timing ................................................................................... 1077
Figure 24-10. MOSC Failure Reset Timing ............................................................................. 1077
Figure 24-11. Hibernation Module Timing with Internal Oscillator Running in Hibernation .......... 1082
Figure 24-12. Hibernation Module Timing with Internal Oscillator Stopped in Hibernation .......... 1082
Figure 24-13. ADC Input Equivalency Diagram ....................................................................... 1084
Figure 24-14. SSI Timing for TI Frame Format (FRF=01), Single Transfer Timing
Measurement .................................................................................................. 1085
Figure 24-15. SSI Timing for MICROWIRE Frame Format (FRF=10), Single Transfer ............... 1086
Figure 24-16. SSI Timing for SPI Frame Format (FRF=00), with SPH=1 ................................... 1086
Figure 24-17. I²C Timing ....................................................................................................... 1087
Figure C-1. Stellaris LM3S5D56 64-Pin LQFP Package ....................................................... 1141
Figure C-2. 64-Pin LQFP Tray Dimensions .......................................................................... 1143
Figure C-3. 64-Pin LQFP Tape and Reel Dimensions ........................................................... 1144
January 23, 2012
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Texas Instruments-Production Data