LM3S5D56 Datasheet, PDF (30/1146 Pages) Texas Instruments – Stellaris® LM3S5D56 Microcontroller

Table of Contents
Register 139: USB Maximum Transmit Data Endpoint 10 (USBTXMAXP10), offset 0x1A0 ...................... 874
Register 140: USB Maximum Transmit Data Endpoint 11 (USBTXMAXP11), offset 0x1B0 ....................... 874
Register 141: USB Maximum Transmit Data Endpoint 12 (USBTXMAXP12), offset 0x1C0 ...................... 874
Register 142: USB Maximum Transmit Data Endpoint 13 (USBTXMAXP13), offset 0x1D0 ...................... 874
Register 143: USB Maximum Transmit Data Endpoint 14 (USBTXMAXP14), offset 0x1E0 ...................... 874
Register 144: USB Maximum Transmit Data Endpoint 15 (USBTXMAXP15), offset 0x1F0 ...................... 874
Register 145: USB Control and Status Endpoint 0 Low (USBCSRL0), offset 0x102 ................................. 876
Register 146: USB Control and Status Endpoint 0 High (USBCSRH0), offset 0x103 ............................... 880
Register 147: USB Receive Byte Count Endpoint 0 (USBCOUNT0), offset 0x108 ................................... 882
Register 148: USB Type Endpoint 0 (USBTYPE0), offset 0x10A ............................................................ 883
Register 149: USB NAK Limit (USBNAKLMT), offset 0x10B .................................................................. 884
Register 150: USB Transmit Control and Status Endpoint 1 Low (USBTXCSRL1), offset 0x112 ............... 885
Register 151: USB Transmit Control and Status Endpoint 2 Low (USBTXCSRL2), offset 0x122 ............... 885
Register 152: USB Transmit Control and Status Endpoint 3 Low (USBTXCSRL3), offset 0x132 ............... 885
Register 153: USB Transmit Control and Status Endpoint 4 Low (USBTXCSRL4), offset 0x142 ............... 885
Register 154: USB Transmit Control and Status Endpoint 5 Low (USBTXCSRL5), offset 0x152 ............... 885
Register 155: USB Transmit Control and Status Endpoint 6 Low (USBTXCSRL6), offset 0x162 ............... 885
Register 156: USB Transmit Control and Status Endpoint 7 Low (USBTXCSRL7), offset 0x172 ............... 885
Register 157: USB Transmit Control and Status Endpoint 8 Low (USBTXCSRL8), offset 0x182 ............... 885
Register 158: USB Transmit Control and Status Endpoint 9 Low (USBTXCSRL9), offset 0x192 ............... 885
Register 159: USB Transmit Control and Status Endpoint 10 Low (USBTXCSRL10), offset 0x1A2 ........... 885
Register 160: USB Transmit Control and Status Endpoint 11 Low (USBTXCSRL11), offset 0x1B2 ........... 885
Register 161: USB Transmit Control and Status Endpoint 12 Low (USBTXCSRL12), offset 0x1C2 .......... 885
Register 162: USB Transmit Control and Status Endpoint 13 Low (USBTXCSRL13), offset 0x1D2 .......... 885
Register 163: USB Transmit Control and Status Endpoint 14 Low (USBTXCSRL14), offset 0x1E2 ........... 885
Register 164: USB Transmit Control and Status Endpoint 15 Low (USBTXCSRL15), offset 0x1F2 ........... 885
Register 165: USB Transmit Control and Status Endpoint 1 High (USBTXCSRH1), offset 0x113 .............. 890
Register 166: USB Transmit Control and Status Endpoint 2 High (USBTXCSRH2), offset 0x123 ............. 890
Register 167: USB Transmit Control and Status Endpoint 3 High (USBTXCSRH3), offset 0x133 ............. 890
Register 168: USB Transmit Control and Status Endpoint 4 High (USBTXCSRH4), offset 0x143 ............. 890
Register 169: USB Transmit Control and Status Endpoint 5 High (USBTXCSRH5), offset 0x153 ............. 890
Register 170: USB Transmit Control and Status Endpoint 6 High (USBTXCSRH6), offset 0x163 ............. 890
Register 171: USB Transmit Control and Status Endpoint 7 High (USBTXCSRH7), offset 0x173 ............. 890
Register 172: USB Transmit Control and Status Endpoint 8 High (USBTXCSRH8), offset 0x183 ............. 890
Register 173: USB Transmit Control and Status Endpoint 9 High (USBTXCSRH9), offset 0x193 ............. 890
Register 174: USB Transmit Control and Status Endpoint 10 High (USBTXCSRH10), offset 0x1A3 ......... 890
Register 175: USB Transmit Control and Status Endpoint 11 High (USBTXCSRH11), offset 0x1B3 .......... 890
Register 176: USB Transmit Control and Status Endpoint 12 High (USBTXCSRH12), offset 0x1C3 ......... 890
Register 177: USB Transmit Control and Status Endpoint 13 High (USBTXCSRH13), offset 0x1D3 ......... 890
Register 178: USB Transmit Control and Status Endpoint 14 High (USBTXCSRH14), offset 0x1E3 ......... 890
Register 179: USB Transmit Control and Status Endpoint 15 High (USBTXCSRH15), offset 0x1F3 ......... 890
Register 180: USB Maximum Receive Data Endpoint 1 (USBRXMAXP1), offset 0x114 ........................... 894
Register 181: USB Maximum Receive Data Endpoint 2 (USBRXMAXP2), offset 0x124 ........................... 894
Register 182: USB Maximum Receive Data Endpoint 3 (USBRXMAXP3), offset 0x134 ........................... 894
Register 183: USB Maximum Receive Data Endpoint 4 (USBRXMAXP4), offset 0x144 ........................... 894
Register 184: USB Maximum Receive Data Endpoint 5 (USBRXMAXP5), offset 0x154 ........................... 894
Register 185: USB Maximum Receive Data Endpoint 6 (USBRXMAXP6), offset 0x164 ........................... 894
Register 186: USB Maximum Receive Data Endpoint 7 (USBRXMAXP7), offset 0x174 ........................... 894
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January 23, 2012
Texas Instruments-Production Data