TLK2226_09 Datasheet, PDF (45/52 Pages) Texas Instruments – 6 PORT GIGABIT ETHERNET TRANSCEIVER

TLK2226
www.ti.com
SLLS689D – JANUARY 2006 – REVISED DECEMBER 2006
POWER SUPPLY SEQUENCING
TI ASIC I/O design allows either the core supply (V_DD) or the I/O supply (V_DDS) to be powered up for an indefinite
period of time while the other power supply is not powered up if all of these constraints are met:
• All maximum ratings and recommended operating conditions
• All warnings about exposure to maximum rated and recommended conditions, particularly junction
temperature. These apply to power transitions as well as normal operation.
• Guidelines for the number and placement of I/O pins
• No bus contention
Bus contention while V_DDS is powered up must be limited to 100 hours over the projected lifetime of the device.
Bus contention while V_DDS is powered down may violate the absolute maximum ratings.
A supply bus is powered up when the voltage is within the recommended operating range. It is powered down
when it is below that range, either stable or in transition.
Table 33. Device Thermal Characteristics
Package Thermal Theta Values
Airflow (m/s)
θ_JA
0
1
2.5
θ_JB
19.8 (C/W)
θ_JC
14.8 (C/W)
Device Maximum Characteristics
Maximum Junction Temperature
115°C
Maximum Power Dissipation
1.5 Watts
Value
32.7 (C/W)
28.7 (C/W)
27.5 (C/W)
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