TLK2226_09 Datasheet, PDF (37/52 Pages) Texas Instruments – 6 PORT GIGABIT ETHERNET TRANSCEIVER

TLK2226
www.ti.com
SLLS689D – JANUARY 2006 – REVISED DECEMBER 2006
Table 30. (Vendor Specific) PRBS High Speed Test Counter (0x1D) Bit Definitions
Bit(s)
Default
Value
29.15:0 16B’1111_1111_1111_1101
Name
PRBS High
Speed Test
Counter
Description
Read/Write
This counter reflects errors for high speed PRBS test
Read Only
pattern (1000Base-X). Counter increments by one for each
received character that has error. This counter saturates at
16’hffff. When read, it resets to zero and continues to
count.
Table 31. (Vendor Specific) Global Test Control Register (0x1E) Bit Definitions
Bit(s)
30.15:14
30.13:12
Default Value
2B’00
2’B00
30.11 2’b0
30.10 1B’0
30.9
1B’0
30.8
1B’0
30.7
1’B1
30.6
1B’0
30.5
1’B0
30.4
1’B0
30.3
1B’1
30.2
30.1:0
1B’0
2B’11
Name
Reserved
RX Ramp Rate
RX Ramp Direction
Rx Ramp Enable
RX Testclock Enable
TX Testclock Enable
Clock Watch
Reserved
TCLK Gating
Global Write
DLL Filter
Reserved
Link Time
Description
Read/Write
Read will return 0, writes will be ignored
Read Only
Ramp Rate control during Ramp test mode
Read/Write
This bit value can be changed per serdes macro by addressing
to the lead channel of a particular macro (Channel A or C or E)
Ramp Rate direction during Ramp test mode
Read/Write
This bit value can be changed per serdes macro by addressing
to the lead channel of a particular macro (Channel A or C or E)
When set enables Ramp test mode in serdes macro
Read/Write
This bit value can be changed per serdes macro by addressing
to the lead channel of a particular macro (Channel A or C or E)
When set enables test clock in all receive SERDES macros
Read/Write
This bit value can be changed by addressing to any channel.
When set enables test clock in all transmit SERDES macros
Read/Write
This bit value can be changed by addressing to any channel.
When set enables Reference Clock Watchdog function
Read/Write
This bit value can be changed by addressing to any channel.
Read will return 0, writes will be ignored
Read Only
For TI Test Purposes Only
Read/Write
This bit value can be changed per serdes macro by addressing
to the lead channel of a particular macro (Channel A or C or E)
If set all write accesses to MDIO Control (R/W) registers
Read/Write
between 0x00 to 0x0F and registers 0x14, 0x1A, and 0x1E affect
all channels in the device.
This bit value can be changed by addressing to any channel.
For TI test purposes
Read/Write
This bit value can be changed by addressing to any channel.
Read will return 0, writes will be ignored
Read Only
Sets the link time used for 1000Base-X autonegotiation. Be
aware: only default setting complies with IEEE802.3.
Read/Write
2B’00 = 500 ns
2B’01 = 10 µs
2B’10 = 1.6 ms
2B’11 = 10 ms (default)
In 100Base-FX mode, these bits are also used. They are used to
set the Far End Fault Link Monitor period. Only the default
setting will comply with the IEEE802.3 standard.
2B’00 = 120 ns
2B’01 = 131 µs
2B’10 = 262 µs
2B’11 = 524 µs (default)
This bit value can be changed per channel.
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