TLK2226_09 Datasheet, PDF (23/52 Pages) Texas Instruments – 6 PORT GIGABIT ETHERNET TRANSCEIVER

TLK2226
www.ti.com
SLLS689D – JANUARY 2006 – REVISED DECEMBER 2006
PHYSICAL CODING SUBLAYER (PCS) FUNCTIONS (1.25 Gbps MODE)
8b/10b Encoder
All true serial interfaces require a method of encoding to insure sufficient transition density for the receiving PLL
to acquire and maintain lock. The encoding scheme also maintains the signal DC balance by keeping the
number of ones and zero’s the same which allows for AC coupled data transmission. The TLK2226 uses the
8B/10B encoding algorithm that is used by Fibre Channel and Gigabit Ethernet. This provides good transition
density for clock recovery and improves error checking. The 8B/10B encoder function is enabled for all channels
by the assertion of the CODE bit. When enabled, the TLK2226 will internally encode the data such that the user
actually writes 8-bit data out on each channel. The encoded 10 bit data will then be transmitted.
When enabled (CODE = high), the 8B/10B encoder converts 8-bit wide data to a 10-bit wide encoded data
character to improve its transition density. This transmission code includes D-characters, used for transmitting
data, and K-characters, used for transmitting protocol information. Each K or D character code word can also
have both a positive and a negative disparity version. The disparity of a code word is selected by the encoder to
balance the running disparity of the serialized data stream.
The TLK2226 will transmit and receive all of the valid K-characters used in the IEEE802.3 Gigabit Ethernet
ordered sets.
8b/10b Decoder
The 8B/10B decoder function is enabled for all channels by the assertion of the CODE bit. When enabled, the
TLK2226 will internally decode the deserialized data such that the user actually reads the decoded bytes out on
each channel.
Clock Tolerance Compensation (CTC) FIFOs
The TLK2226 compensates for the possibility that incoming serial data rate on any channel can be as much as
100 ppm faster or slower than the REFCLK frequency (±100ppm). Each channel independently and dynamically
compensates for any frequency difference by use of an elasticity buffer. If the incoming data rate is faster than
the REFCLK frequency, the elasticity buffer will fill. As it approaches the FILL limit, it will delete or drop a 20-bit
IDLE code⁽³⁾ found in the IPG (inter packet gap) between Ethernet packets. If the incoming data rate is slower
than the REFCLK, the elasticity buffer will empty. As it approaches the EMPTY limit, it will add or insert the
20-bit IDLE code found in the gap between Ethernet packets. Idle code selection defaults to IDLE2, a K28.5
followed by a D16.2. No running disparity is affected due either the addition or the deletion of the IDLE2 code as
the IDLE2 code has a balanced number of 1's and 0's. Note that a deletion of a 20-bit IDLE2 code could reduce
the inter-packet gap below the minimum inter-packet gap of 12 bytes (120 bits).
The CTC function will only add or delete IDLE codes in the inter-packet gap. Thus the CTC FIFO depth is sized
to insure that maximum size Ethernet packets (9300 bytes) can be continuously received at the frequency offset
extremes without loss of data or synchronization and still meet latency requirements per the standard. The CTC
function can be disabled for all channels via the MDIO registers or through its dedicated pin. The CTC function
is available only when the TLK2226 is set in the transceiver mode by MDIO or CODE pin or activation.
During Auto-negotiation the TLK2226 will support clock tolerance during config word (which are converted to
idles by the PCS receive state machine) reception, so that FIFO overrun or underrun does not occur during
auto-negotiation.
AutoNegotiation (AN)
AN is initialized for all channels at power-up once all PLL’s have locked. AN can be restarted on a per channel
basis by writing a logic HIGH to the MDIO reg0x00[9] for the specific channel. The AN process is implemented
according to IEEE 802.3z clause 37. The Status and results of the AN process can be read from the MDIO.
TLK2226 also supports the transmit of NextPage (NP) information provided by it’s management device via
MDIO.
CODE needs to be asserted and ‘AN Enable’ register in the MDIO 0x00[12] is set to a logic HIGH.
(3) IEEE802.3z specifies an IDLE as a 20-bit code consisting of an IDLE1 code (/K28.5/D5.6) or an IDLE2 code (/K28.5/D16.2).
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