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TLK2226_09 Datasheet, PDF (4/52 Pages) Texas Instruments – 6 PORT GIGABIT ETHERNET TRANSCEIVER
TLK2226
SLLS689D – JANUARY 2006 – REVISED DECEMBER 2006
www.ti.com
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range (unless otherwise noted) (1)
VDDQ
VDDS
VDD , VDDA
VI
I/O Supply voltage(2)
I/O Supply voltage(2)
Core Supply voltage(2)
LVCMOS
Input voltage
HSTL
DC Input voltage (I/O )
Storage temperature
Electrostatic discharge
Characterized free-air operating temperature range
VALUE
–0.3 to 2.5
–0.3 to 3.6
–0.3 to 2.5
–0.5 to 3.6
–0.5 to 2.5
–0.3 to 2.5
–65 to 85
HBM: 2KV, CDM:750
0 to 70
UNIT
V
V
V
V
V
°C
V
°C
(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltage values, except differential I/O bus voltages, are with respect to network ground terminal
RECOMMENDED OPERATING CONDITIONS
MIN NOM MAX UNIT
VDD
Core supply voltage
Peak-peak AC noise in the 1–10 MHz range may not
exceed 100 mV
1.7
1.8 1.9 V
VDDQ HSTL I/O supply voltage
1.5 V HSTL Class 1 peak-peak AC noise may not
exceed 150 mV
1.8 V HSTL Class 1 peak-peak AC noise may not
exceed 150 mV
1.4
1.5 1.6 V
1.7
1.8 1.9 V
1.8 V CMOS peak-peak AC noise may not exceed 150
mV
1.7
1.8 1.9 V
VDDS LVCMOS I/O supply voltage
2.5 V CMOS peak-peak AC noise may not exceed 150
mV
2.375
2.5 2.625 V
3.3 V CMOS peak-peak AC noise may not exceed 150
mV
3.14
3.3 3.47 V
VDDA Analog supply voltage
Peak-peak AC noise in the 1–10 MHz range may not
exceed 100 mV
1.7
1.8 1.9 V
VREF Input reference voltage(1)
1.5 V HSTL Class 1
1.8 V HSTL Class 1
0.7 0.75 0.8
V
0.85
0.9 0.95
IDD
I_HSTL
Core supply current
HSTL I/O supply current
IDDS
LVCMOS I/O supply current
IDDA
PD
IDDQ
Analog supply current
Total power consumption
Shutdown current
Rω = 125 MHz, VDD = 1.8 V
Rω = 125 MHz, VDDQ = 1.5 V
Rω = 125 MHz, VDDQ = 1.8 V
Rω = 125 MHz, VDDS = 1.8 V
Rω = 125 MHz, VDDS = 2.5 V
Rω = 125 MHz, VDDS = 3.3 V
Rω = 125 MHz, VDDA = 1.8 V
Rω = 125 MHz, VDDQ = 1.8 V
ENABLE = low
390 mA
146
mA
204
1
3 mA
7
183 mA
1.50 W
30
mA
(1) Typically, the value of VREF is expected to be 0.5 VDDQ of the transmitting device and VREF is expected to track variations in VDDQ.
LVCMOS ELECTRICAL CHARACTERISTICS(1)
over recommended operating conditions (unless otherwise noted)
PARAMETER
VOH High-level output voltage
TEST CONDITIONS
IOH = –400 µA, VDDS = MIN
MIN
VDDS– 0.2
TYP
MAX
VDDS
UNIT
V
(1) Unused inputs that do not hold an integrated pull up or pull down circuit need to be terminated to either GND or VDDQ respectively to
avoid extensive currents and life time degradation.
4
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