TLK2226_09 Datasheet, PDF (3/52 Pages) Texas Instruments – 6 PORT GIGABIT ETHERNET TRANSCEIVER

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Line Card
RCLK
6
RD..F[4:0]
RX+
RX−
TLK2226
TCLK
6
TDA..F[4:0]
TX+
TX−
TLK2226
SLLS689D – JANUARY 2006 – REVISED DECEMBER 2006
MAC/
PACKET
PROCESSOR
TCLK
TDA..F[4:0]
6
6
TX−
TX+
TLK2226
Electrical to
Optical Array
RCLK
RDA..F4:0]
RX−
6
6
RX+
RCLK
6
RDA..F4:0]
RX+
RX−
TLK2226
TCLK
6
TDA..F[4:0]
TX+
TX−
SWITCH
FABRIC
Figure 1. TLK2226 System Implementation Diagram
RX RGMII A
TX RGMII A
TX RGMII B
RX RGMII B
REFCLK
5bit DDR
to
10bit
SDR
Interface
5bit DDR
to
10bit
SDR
Interface
PCS
Logic
PCS
Logic
CTC
Decode
Encode
Encode
Decode
CTC
channel A
TX Analog
Core
channel B
2 of the 6 channels of TLK2226 shown
data path for RGMII mode
Clock
Synthesizer
Common Control ^MDIO/MDC
logic
Figure 2. TLK2226 Block Diagram
channel A
RX Analog
Core
channel B
+
TX_{_}A
+
_^RXA
+
RXB
_
+
TXB
_
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