SI5341_16 Datasheet, PDF (9/53 Pages) Silicon Laboratories – Low-Jitter, 10 or 4-Output, Any-Frequency, Any-Output Clock Generator

Si5341/40 Rev D Data Sheet
Functional Description
3.5 Outputs
The Si5341 supports 10 differential output drivers which can be independently configured as differential or LVCMOS. The Si5340 sup-
ports 4 output drivers independently configurable as differential or LVCMOS.
3.5.1 Output Signal Format
The differential output amplitude and common mode voltage are both fully programmable and compatible with a wide variety of signal
formats including LVDS and LVPECL. In addition to supporting differential signals, any of the outputs can be configured as LVCMOS
(3.3 V, 2.5 V, or 1.8 V) drivers providing up to 20 single-ended outputs, or any combination of differential and single-ended outputs.
3.5.2 Differential Output Terminations
The differential output drivers support both ac-coupled and dc-coupled terminations as shown in the figure below.
DC Coupled LVDS
VDDO = 3.3V , 2.5V , 1.8V
50
OUTx
OUTxb
100
50
Si 5341/40
AC Coupled LVDS/LVPECL
VDDO = 3.3V , 2.5V , 1.8V
50
OUTx
OUTxb
100
50
Si 5341/40
Internally
self-biased
AC Coupled HCSL
VDDO = 3.3V, 2.5V, 1.8V
Si5341/ 40
OUTx
OUTxb
R1 R1
50
50
R2 R2
VDDRX
Standard
HCSL
Receiver
AC Coupled LVPECL/CML
VDDO = 3.3V , 2.5V
Si 5341/40
OUTx
OUTxb
VDD– 1.3V
50
50
50
50
For V_CO_Mpt=io0n.137V
VDD_RX
3. 3 V
2. 5 V
1. 8 V
R1
R2
442 ohms 56.2 ohms
332 ohms 59 ohms
243 ohms 63.4 ohms
Figure 3.5. Supported Differential Output Terminations
3.5.3 Programmable Common Mode Voltage for Differential Outputs
The common mode voltage (VCM) for the differential modes are programmable so that LVDS specifications can be met and for the best
signal integrity with different supply voltages. When dc coupling the output driver it is essential that the receiver should have a relatively
high common mode impedance so that the common mode current from the output driver is very small.
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