SI5341_16 Datasheet, PDF (23/53 Pages) Silicon Laboratories – Low-Jitter, 10 or 4-Output, Any-Frequency, Any-Output Clock Generator

Si5341/40 Rev D Data Sheet
Electrical Specifications
Table 5.5. Differential Clock Output Specifications
(V_DD=1.8 V ± 5%, V_DDA=3.3V ± 5%, V_DDO=1.8 V ± 5%, 2.5 V ± 5%, or 3.3 V ± 5%, T_A= -40 to 85°C)
Parameter
Output Frequency
Duty Cycle
Output-Output Skew
Using Same MultiSynth
Output-Output Skew
Between MultiSynths
OUT-OUTb Skew
Output Voltage Swing¹
Common Mode Voltage^{1, 2}
Rise and Fall Times
(20% to 80%)
Differential Output Impedance
Power Supply Noise Rejection²
Output-Output Crosstalk³
Symbol
f_OUT
DC
T_SKS
T_SKD
T_{SK_OUT}
V_OUT
V_CM
t_R/t_F
Z_O
PSRR
XTALK
Test Condition
MultiSynth not used
MultiSynth used
f_OUT < 400 MHz
400 MHz < f_OUT < 1028 MHz
Outputs on same MultiSynth
(Measured at 712.5 MHz)
Outputs from different
MultiSynths
(Measured at 712.5 MHz)
Measured from the positive
to negative output pins
LVDS
LVPECL
V_DDO = 3.3 V
LVDS
LVPECL
V_DDO = 2.5 V
LVPECL
LVDS
V_DDO = 1.8 V Sub-LVDS
Min
0.0001
733.33
825
0.0001
48
45
—
—
—
350
640
1.10
1.90
1.1
0.8
—
—
10 kHz sinusoidal noise
—
100 kHz sinusoidal noise
—
500 kHz sinusoidal noise
—
1 MHz sinusoidal noise
—
Si5341
—
Si5340
—
Typ
—
—
—
—
—
—
—
—
0
430
750
1.2
2.0
1.2
0.9
100
100
–101
–96
–99
–97
–72
–88
Max
720
800.00
1028
720
52
55
65
Units
MHz
MHz
%
%
ps
90
ps
50
ps
510
mVpp_se
900
1.3
V
2.1
1.3
1.0
150
ps
—
Ω
—
dBc
—
—
—
—
dBc
—
dBc
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