SI5341_16 Datasheet, PDF(6/53 Page) Silicon Laboratories – Low-Jitter, 10 or 4-Output, Any-Frequency, Any-Output Clock Generator

English

English German Russian Spanish Italian Polish Chinese Japanese Korean French Portuguese	Language :

SI5341_16 Datasheet, PDF (6/53 Pages) Silicon Laboratories – Low-Jitter, 10 or 4-Output, Any-Frequency, Any-Output Clock Generator

◁

Si5341/40 Rev D Data Sheet

Functional Description

3.3.1 XA/XB Clock and Crystal Input

An internal crystal oscillator exists between pin XA and XB. When this oscillator is enabled, an external crystal connected across these

pins will oscillate and provide a clock input to the PLL. A crystal frequency of 25 MHz can be used although crystals in the frequency

range of 48 MHz to 54 MHz are recommended for best jitter performance. Frequency offsets due to CL mismatch can be adjusted using

the frequency adjustment feature which allows frequency adjustments of Â± 1000 ppm. The Si5340/41 Family Reference Manual pro-

vides additional information on PCB layout recommendations for the crystal to ensure optimum jitter performance. Refer to Table

5.12 Crystal Specifications on page 31 for crystal specifications.

To achieve optimal jitter performance and minimize BOM cost, a crystal is recommended on the XA/XB reference input. A clock (e.g.,

XO) may be used in lieu of the crystal, but it will result in higher output jitter. See the Si5340/41 Reference Manual for more information.

Selection between the external XTAL or input clock is controlled by register configuration. The internal crystal load capacitors (CL) are

disabled in the input clock mode. Refer to Table 5.3 Input Clock Specifications on page 20 for the input clock requirements at XAXB.

Both a single-ended or a differential input clock can be connected to the XA/XB pins as shown in the figure below. A PXAXB divider is

available to accommodate external clock frequencies higher than 54 MHz.

Differential Connection

nc X1

nc X2

2xCL

0. 1 uf

OSC

2xCL

0. 1 uf

Note: 2. 5 Vpp diff max

Si 5341/40

Single- ended XO Connection

nc X1

nc X2

Note: 2. 0 Vpp_ se max

2xCL

0. 1 uf

OSC

XO with Clipped Sine Wave 0. 1 uf XB

Output

2xCL

Si 5341/40

Single-ended Connection

nc X1

nc X2

CMOS Output

Note: 2. 0 Vpp_ se max

0. 1 uf

2xCL

OSC

XO VDD R 1

3. 3 V 523 ohms442 ohms

2. 5 V 475ohms 649 ohms

0. 1 uf

0. 1 uf XB

2xCL

1. 8 V 158 ohms 866 ohms

Si 5341/40

Crystal Connection

XTAL

2xCL

OSC

2xCL

Si 5341/40

Figure 3.2. XAXB External Crystal and Clock Connections

silabs.com | Smart. Connected. Energy-friendly.

Rev. 1.0 | 5

▷