C8051F980-C-GM Datasheet, PDF (28/325 Pages) Silicon Laboratories – Ultra Low Power, 8-2 kB Flash, Capacitive Sensing MCU

C8051F99x-C8051F98x
1.5. SAR ADC with 16-bit Auto-Averaging Accumulator and Autonomous Low
Power Burst Mode
C8051F99x-C8051F98x devices have a 300 ksps, 10-bit or 75 ksps 12-bit successive-approximation-
register (SAR) ADC with integrated track-and-hold and programmable window detector. ADC0 also has an
autonomous low power Burst Mode which can automatically enable ADC0, capture and accumulate
samples, then place ADC0 in a low power shutdown mode without CPU intervention. It also has a 16-bit
accumulator that can automatically average the ADC results, providing an effective 11, 12, or 13 bit ADC
result without any additional CPU intervention.
The ADC can sample the voltage at select GPIO pins (see Figure 1.17) and has an on-chip attenuator that
allows it to measure voltages up to twice the voltage reference. Additional ADC inputs include an on-chip
temperature sensor, the VDD supply voltage, and the internal digital supply voltage.
ADC0CN
ADC0TK
ADC0PWR
Burst Mode Logic
VDD
From
AMUX0
AIN+
10/12-Bit
SAR
ADC
000
Start
Conversion
001
010
011
100
AD0BUSY (W)
Timer 0 Overflow
Timer 2 Overflow
Timer 3 Overflow
CNVSTR Input
16-Bit Accumulator
ADC0LTH ADC0LTL
A D 0 W IN T
Window
Compare
32
Logic
ADC0CF
ADC0GTH ADC0GTL
Figure 1.16. ADC0 Functional Block Diagram
28
Rev. 1.2