C8051F980-C-GM Datasheet, PDF (163/325 Pages) Silicon Laboratories – Ultra Low Power, 8-2 kB Flash, Capacitive Sensing MCU

C8051F99x-C8051F98x
15.1. Normal Mode
The MCU is fully functional in normal mode. Figure 15.1 shows the on-chip power distribution to various
peripherals. There are two supply voltages powering various sections of the chip: V_DD and the 1.8 V inter-
nal core supply. All analog peripherals are directly powered from the V_DD pin. All digital peripherals and the
CIP-51 core are powered from the 1.8 V internal core supply. RAM, PMU0 and the SmaRTClock are
always powered directly from the V_DD pin in sleep mode and powered from the core supply in all other
power modes.
VDD
1.8 to 3.6 V
Sleep
PMU0
SmaRTClock
GPIO
Analog Peripherals
VREG0
Active/Idle/
Stop/Suspend _{1.8 V}
RAM
VREF
IREF0
A
M
U
ADC
+
X
TEMP
SENSOR
-
VOLTAGE
COMPARATOR
Digital Peripherals
CIP-51
Core
Flash
UART
SPI
Timers
SMBus
Figure 15.1. C8051F99x-C8051F98x Power Distribution
Rev. 1.2
163