C8051F980-C-GM Datasheet, PDF (236/325 Pages) Silicon Laboratories – Ultra Low Power, 8-2 kB Flash, Capacitive Sensing MCU

C8051F99x-C8051F98x
22.1. Supporting Documents
It is assumed the reader is familiar with or has access to the following supporting documents:
 The I²C-Bus and How to Use It (including specifications), Philips Semiconductor.
 The I²C-Bus Specification—Version 2.0, Philips Semiconductor.
 System Management Bus Specification—Version 1.1, SBS Implementers Forum.
22.2. SMBus Configuration
Figure 22.2 shows a typical SMBus configuration. The SMBus specification allows any recessive voltage
between 3.0 V and 5.0 V; different devices on the bus may operate at different voltage levels.
Note: The port pins on C8051F99x-C8051F98x devices are not 5 V tolerant, therefore, the device may only be used
in SMBus networks where the supply voltage does not exceed V_DD.
The bi-directional SCL (serial clock) and SDA (serial data) lines must be connected to a positive power
supply voltage through a pullup resistor or similar circuit. Every device connected to the bus must have an
open-drain or open-collector output for both the SCL and SDA lines, so that both are pulled high (recessive
state) when the bus is free. The maximum number of devices on the bus is limited only by the requirement
that the rise and fall times on the bus not exceed 300 ns and 1000 ns, respectively.
VDD = 3 V
VDD = 3 V
VDD = 3 V
VDD = 3 V
Master
Device
Slave
Device 1
Slave
Device 2
SDA
SCL
Figure 22.2. Typical SMBus Configuration
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Rev. 1.2