C8051F980-C-GM Datasheet, PDF (132/325 Pages) Silicon Laboratories – Ultra Low Power, 8-2 kB Flash, Capacitive Sensing MCU

C8051F99x-C8051F98x
12. Special Function Registers
The direct-access data memory locations from 0x80 to 0xFF constitute the special function registers
(SFRs). The SFRs provide control and data exchange with the C8051F99x-C8051F98x's resources and
peripherals. The CIP-51 controller core duplicates the SFRs found in a typical 8051 implementation as well
as implementing additional SFRs used to configure and access the sub-systems unique to the
C8051F99x-C8051F98x. This allows the addition of new functionality while retaining compatibility with the
MCS-51™ instruction set. Table 12.1 and Table 12.2 list the SFRs implemented in the C8051F99x-
C8051F98x device family.
The SFR registers are accessed anytime the direct addressing mode is used to access memory locations
from 0x80 to 0xFF. SFRs with addresses ending in 0x0 or 0x8 (e.g., P0, TCON, SCON0, IE, etc.) are bit-
addressable as well as byte-addressable. All other SFRs are byte-addressable only. Unoccupied
addresses in the SFR space are reserved for future use. Accessing these areas will have an indeterminate
effect and should be avoided. Refer to the corresponding pages of the data sheet, as indicated in
Table 12.3, for a detailed description of each register.
Table 12.1. Special Function Register (SFR) Memory Map (Page 0x0)
F8 SPI0CN PCA0L PCA0H PCA0CPL0 PCA0CPH0
F0 B
P0MDIN P1MDIN CS0MD2 SMB0ADR
E8 ADC0CN PCA0CPL1 PCA0CPH1 PCA0CPL2 PCA0CPH2
E0 ACC
XBR0
XBR1
XBR2
IT01CF
D8 PCA0CN PCA0MD PCA0CPM0 PCA0CPM1 PCA0CPM2
D0 PSW REF0CN CS0SCAN0 CS0SCAN1 P0SKIP
C8 TMR2CN REG0CN TMR2RLL TMR2RLH TMR2L
C0 SMB0CN SMB0CF SMB0DAT ADC0GTL ADC0GTH
B8 IP IREF0CN ADC0AC ADC0PWR ADC0TK
B0 CS0CN OSCXCN OSCICN OSCICL
A8 IE
CLKSEL CS0CF CS0MX RTC0ADR
A0 P2 SPI0CFG SPI0CKR SPI0DAT P0MDOUT
98 SCON0 SBUF0 CRC0CNT CPT0CN CRC0FLIP
90 P1 TMR3CN TMR3RLL TMR3RLH TMR3L
88 TCON TMOD
TL0
TL1
TH0
80 P0
SP
DPL
DPH CRC0CN
0(8)
1(9)
2(A)
3(B)
4(C)
(bit addressable)
CS0THL
SMB0ADM
CS0DL
FLWR
CS0SS
P1SKIP
TMR2H
ADC0LTL
ADC0L
PMU0CF
RTC0DAT
P1MDOUT
CPT0MD
TMR3H
TH1
CRC0IN
5(D)
CS0THH VDM0CN
EIP1
EIP2
CS0DH RSTSRC
EIE1
EIE2
CS0SE PCA0PWM
IREF0CN P0MAT
PMU0FL P1MAT
ADC0LTH P0MASK
ADC0H P1MASK
FLSCL
FLKEY
RTC0KEY CS0MD1
P2MDOUT SFRPAGE
CRC0AUTO CPT0MX
ADC0MX ADC0CF
CKCON PSCTL
CRC0DAT PCON
6(E)
7(F)
132
Rev. 1.2