C8051F980-C-GM Datasheet, PDF (166/325 Pages) Silicon Laboratories – Ultra Low Power, 8-2 kB Flash, Capacitive Sensing MCU

C8051F99x-C8051F98x
RAM and SFR register contents are preserved in sleep mode as long as the voltage on V_DD does not fall
below V_POR. The PC counter and all other volatile state information is preserved allowing the device to
resume code execution upon waking up from sleep mode.
Important Note: On device reset or upon waking up from Sleep mode, address 0x0000 of external mem-
ory may be overwritten by an indeterminate value. The indeterminate value is 0x00 in most situations. A
dummy variable should be placed at address 0x0000 in external memory to ensure that the application
firmware does not store any data that needs to be retained during sleep or reset at this memory location.
The following wake-up sources can be configured to wake the device from sleep mode:
 SmaRTClock Oscillator Fail
 SmaRTClock Alarm
 Port Match Event
 Comparator0 Rising Edge
The comparator requires a supply voltage of at least 1.8 V to operate properly. On C8051F99x-C8051F98x
devices, the POR supply monitor can be disabled to save power by writing 1 to the MONDIS (PMU0MD.5)
bit. When the POR supply monitor is disabled, all reset sources will trigger a full POR and will re-enable the
POR supply monitor.
Important Note: The POR Supply Monitor should not be disabled if the supply voltage is greater than
2.4 V. The lowest power sleep mode current, 10 nA typical, can only be achieved when the supply voltage
is less than 2.4 V. The lowest power sleep mode for voltages above 2.4 V is 50 nA typical with the POR
Supply Monitor enabled.
In addition, any falling edge on RST (due to a pin reset or a noise glitch) will cause the device to exit sleep
mode. In order for the MCU to respond to the pin reset event, software must not place the device back into
sleep mode for a period of 15 µs. The PMU0CF register may be checked to determine if the wake-up was
due to a falling edge on the RST pin. If the wake-up source is not due to a falling edge on RST, there is no
time restriction on how soon software may place the device back into sleep mode. A 4.7 k pullup resistor
to VDD is recommend for RST to prevent noise glitches from waking the device.
15.6. Configuring Wakeup Sources
Before placing the device in a low power mode, one or more wakeup sources should be enabled so that
the device does not remain in the low power mode indefinitely. For Idle Mode, this includes enabling any
interrupt. For Stop Mode, this includes enabling any reset source or relying on the RST pin to reset the
device.
Wake-up sources for suspend and sleep modes are configured through the PMU0CF register. Wake-up
sources are enabled by writing 1 to the corresponding wake-up source enable bit. Wake-up sources must
be re-enabled each time the device is placed in suspend or sleep mode, in the same write that places the
device in the low power mode.
The reset pin is always enabled as a wake-up source. On the falling edge of RST, the device will be
awaken from sleep mode. The device must remain awake for more than 15 µs in order for the reset to take
place.
166
Rev. 1.2