C8051F980-C-GM Datasheet, PDF (176/325 Pages) Silicon Laboratories – Ultra Low Power, 8-2 kB Flash, Capacitive Sensing MCU

C8051F99x-C8051F98x
SFR Definition 16.2. CRC0IN: CRC0 Data Input
Bit
7
6
5
4
3
2
1
0
Name
CRC0IN[7:0]
Type
R/W
Reset
0
0
0
0
0
0
0
0
SFR Page = All; SFR Address = 0x85
Bit
Name
Function
7:0 CRC0IN[7:0] CRC0 Data Input.
Each write to CRC0IN results in the written data being computed into the existing
CRC result according to the CRC algorithm described in Section 16.1
SFR Definition 16.3. CRC0DAT: CRC0 Data Output
Bit
7
6
5
4
3
2
1
0
Name
CRC0DAT[7:0]
Type
R/W
Reset
0
0
0
0
0
0
0
0
SFR Page = All; SFR Address = 0x86
Bit
Name
Function
7:0 CRC0DAT[7:0] CRC0 Data Output.
Each read or write performed on CRC0DAT targets the CRC result bits pointed to
by the CRC0 Result Pointer (CRC0PNT bits in CRC0CN).
176
Rev. 1.2