C515A_9708 Datasheet, PDF (58/182 Pages) Siemens Semiconductor Group – 8-Bit CMOS Microcontroller

On-Chip Peripheral Components
C515A
6.1.2.3 Port 2 Circuitry
As shown in figure 6-3 and below in figure 6-5, the output drivers of ports 0 and 2 can be switched
to an internal address or address/data bus for use in external memory accesses. In this application
they cannot be used as general purpose I/O, even if not all address lines are used externally. The
switching is done by an internal control signal dependent on the input level at the EA pin and/or the
contents of the program counter. If the ports are configured as an address/data bus, the port latches
are disconnected from the driver circuit. During this time, the P2 SFR remains unchanged while the
P0 SFR has 1’s written to it. Being an address/data bus, port 0 uses a pullup FET as shown in
figure 6-3. When a 16-bit address is used, port 2 uses the additional strong pullups p1 (figure 6-6)
to emit 1’s for the entire external memory cycle instead of the weak ones (p2 and p3) used during
normal port activity.
Read
Latch
Int. Bus
Write to
Latch
D
Q
Bit
Latch
CLK
Q
Addr. Control
V_CC
Internal
Pull Up
Arrangement
Port
Pin
MUX
=1
Read
Pin
MCS03228
Figure 6-5
Port 2 Circuitry
If no external bus cycles are generated using data or code memory accesses, port 0 can be used
for I/O functions.
Semiconductor Group
6-7
1997-08-01