C515A_9708 Datasheet, PDF (154/182 Pages) Siemens Semiconductor Group – 8-Bit CMOS Microcontroller

Power Saving Modes
C515A
9.4.2 Exit from Software Power Down Mode
If software power down mode is exit via a hardware reset, the microcontroller with its SFRs is put
into the hardware reset state and the content of RAM and XRAM are not changed. The reset signal
that terminates the software power down mode also restarts the RC oscillator and the on-chip
oscillatror. The reset operation should not be activated before V_CC is restored to its normal
operating level and must be held active long enough to allow the oscillator to restart and stabilize
(similar to power-on reset).
Figure 9-1 shows the procedure which must is executed when software power down mode is left
via the P3.2/INT0 wake-up capability.
Figure 9-1
Wake-up from Power Down Mode Procedure
When the software power down mode wake-up capability has been enabled (bit EWPD in SFR
PCON1 set) prior to entering software power down mode, the software power down mode can be
exit via INT0 while executing the following procedure :
1. In software power down mode pin P3.2/INT0 must be held at high level.
2. software power down mode is left when P3.2/INT0 goes low for at least 10 µs (latch phase). After
this delay the internal RC oscillator and the on-chip oscillator are started, the state of pin P3.2/
INT0 is internally latched, and P3.2/INT0 can be set again to high level if required. Thereafter,
the oscillator watchdog unit controls the wake-up procedure in its start-up phase.
Semiconductor Group
9-7
1997-08-01