C515A_9708 Datasheet, PDF (110/182 Pages) Siemens Semiconductor Group – 8-Bit CMOS Microcontroller

On-Chip Peripheral Components
C515A
6.4
A/D Converter
The C515A includes a high performance / high speed 10-bit A/D-Converter (ADC) with 8 analog
input channels. It operates with a successive approximation technique and uses self calibration
mechanisms for reduction and compensation of offset and linearity errors. The A/D converter
provides the following features:
– 8 multiplexed input channels (port 6), which can also be used as digital inputs
– 10-bit resolution
– Single or continuous conversion mode
– Internal or external start-of-conversion trigger capability
– Interrupt request generation after each conversion
– Using successive approximation conversion technique via a capacitor array
– Built-in hidden calibration of offset and linearity errors
The externally applied reference voltage range has to be held on a fixed value within the
specifications. The main functional blocks of the A/D converter are shown in figure 6-31.
6.4.1
A/D Converter Operation
An internal start of a single A/D conversion is triggered by a write-to-ADDATL instruction. When
single conversion mode is selected (bit ADM=0) only one A/D conversion is performed. In
continuous mode (bit ADM=1), after completion of an A/D conversion a new A/D conversion is
triggered automatically until bit ADM is reset.
An externally controlled conversion can be achieved by setting the bit ADEX. In this mode one
single A/D conversion is triggered by a 1-to-0 transition at pin P4.0/ADST (when ADM is 0). P4.0/
ADST is sampled during S5P2 of every machine cycle. When the samples show a logic high in one
cycle and a logic low in the next cycle the transition is detected and the A/D conversion is started.
When ADM and ADEX is set, a continuous conversion is started when pin P4.0/ADST sees a low
level. Only if no A/D conversion (single or continuous) has occurred after the last reset operation, a
1-to-0 transition is required at pin P4.0/ADST for starting the continuous conversion mode
externally. The continuous A/D conversion is stopped when the pin P4.0/ADST goes back to high
level. The last running A/D conversion during P4.0/ADST low level will be completed.
The busy flag BSY (ADCON0.4) is automatically set when an A/D conversion is in progress. After
completion of the conversion it is reset by hardware. This flag can be read only, a write has no
effect. The interrupt request flag IADC (IRCON.0) is set when an A/D conversion is completed.
The bits MX0 to MX2 in special function register ADCON0 and ADCON1 are used for selection of
the analog input channel. The bits MX0 to MX2 are represented in both registers ADCON0 and
ADCON1; however, these bits are present only once. Therefore, there are two methods of selecting
an analog input channel : If a new channel is selected in ADCON1 the change is automatically done
in the corresponding bits MX0 to MX2 in ADCON0 and vice versa.
Port 6 is a dual purpose input port. lf the input voltage meets the specified logic levels, it can also
be used as digital inputs regardless of whether the pin levels are sampled by the A/D converter at
the same time.
Semiconductor Group
6-59
1997-08-01