C515A_9708 Datasheet, PDF (33/182 Pages) Siemens Semiconductor Group – 8-Bit CMOS Microcontroller

Memory Organization
C515A
Table 3-2
Contents of the SFRs, SFRs in numeric order of their addresses
Addr Register Content Bit 7
after
Reset¹⁾
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
80H ²⁾ P0
FFH
.7
.6
.5
.4
.3
.2
.1
.0
81H SP
07H
.7
.6
.5
.4
.3
.2
.1
.0
82H DPL
00H
.7
.6
.5
.4
.3
.2
.1
.0
83H DPH
00H
.7
.6
.5
.4
.3
.2
.1
.0
86H WDTREL 00H
WDT .6
.5
.4
.3
.2
.1
.0
PSEL
87H PCON
88H ²⁾ TCON
88H ³⁾ PCON1
89H TMOD
8AH TL0
8BH TL1
8CH TH0
8DH TH1
90H ²⁾ P1
00H
00H
0XXX-
XXXXB
00H
00H
00H
00H
00H
FFH
SMOD
TF1
EWPD
GATE
.7
.7
.7
.7
T2
PDS
TR1
–
C/T
.6
.6
.6
.6
CLK-
OUT
IDLS SD
TF0 TR0
–
–
M1
.5
.5
.5
.5
T2EX
M0
.4
.4
.4
.4
INT2
GF1 GF0
IE1 IT1
–
–
GATE
.3
.3
.3
.3
INT6
C/T
.2
.2
.2
.2
INT5
PDE
IE0
–
M1
.1
.1
.1
.1
INT4
IDLE
IT0
–
M0
.0
.0
.0
.0
INT3
91H XPAGE 00H
.7
.6
.5
.4
.3
.2
.1
.0
98H ²⁾ SCON 00H
SM0 SM1 SM2 REN TB8 RB8 TI
RI
99H SBUF XXH T2
.6
.5
.4
.3
.2
.1
.0
A0H²⁾ P2
FFH
.7
.6
.5
.4
.3
.2
.1
.0
A8H²⁾ IEN0
00H
EAL WDT ET2 ES
ET1 EX1 ET0 EX0
A9H IP0
00H
OWDS WDTS .5
.4
.3
.2
.1
.0
AAH SRELL D9H .7
.6
.5
.4
.3
.2
.1
.0
B0H²⁾ P3
FFH
RD
WR
T1
T0
INT1 INT0 TxD RxD
B1H SYSCON XX10- –
–
EALE RMAP –
–
XMAP1 XMAP0
XX01B
B8H²⁾ IEN1
00H
EXEN2 SWDT EX6 EX5 EX4 EX3 EX2 EADC
B9H IP1
XX00- –
–
.5
.4
.3
.2
.1
.0
0000B
1) _{X means that the value is undefined and the location is reserved}
2) _{Bit-addressable special function registers}
3) _{SFR is located in the mapped SFR area. For accessing this SFR, bit RMAP in SFR SYSCON must be set.}
Semiconductor Group
3-14
1997-08-01