C515A_9708 Datasheet, PDF (155/182 Pages) Siemens Semiconductor Group – 8-Bit CMOS Microcontroller

Power Saving Modes
C515A
3. The oscillator watchdog unit starts operation. When the on-chip oscillator clock is detected for
stable nominal frequency, the microcontroller starts again with its operation initiating the power
down wake-up interrupt. The interrupt address of the first instruction to be executed after wake-
up is 007BH.
4. After the RETI instruction of the power down wake-up interrupt routine has been executed, the
instruction which follows the initiating software power down mode double instruction sequence
will be executed. The peripheral units timer 0/1/2 , SSC, CAN controller, and WDT are frozen
until end of phase 4.
All interrupts of the C515A are disabled from phase 2) until the end of phase 4). Other Interrupts
can be first handled after the RETI instruction of the wake-up interrupt routine.
9.5 State of Pins in Software Initiated Power Saving Modes
In the idle mode and in the software power down mode the port pins of the C515A have a well
defined status which is listed in the following table 9-1. This state of some pins also depends on the
location of the code memory (internal or external).
Table 9-1
Status of External Pins During Idle and Software Power Down Mode
Outputs
ALE
PSEN
PORT 0
PORT2
PORT1, 3, 5
PORT 5
P7.0
Last Instruction Executed from
Internal Code Memory
Idle
Power Down
High
Low
High
Low
Data
Data
Data
Data
Data /
Data /
alternate outputs last output
Data
Data
Data
Data
Last Instruction Executed from
External Code Memory
Idle
Power Down
High
Low
High
Low
Float
Float
Address
Data
Data /
Data /
alternate outputs last output
Data
Data
Data
Data
Semiconductor Group
9-8
1997-08-01