C515A_9708 Datasheet, PDF (125/182 Pages) Siemens Semiconductor Group – 8-Bit CMOS Microcontroller

Interrupt System
C515A
7.1 Interrupt Registers
7.1.1 Interrupt Enable Registers
Each interrupt vector can be individually enabled or disabled by setting or clearing the
corresponding bit in the interrupt enable registers IEN0 and IEN1. Register IEN0 also contains the
global disable bit (EAL), which can be cleared to disable all interrupts at once. Generally, after reset
all interrupt enable bits are set to 0. That means that the corresponding interrupts are disabled.
The IEN0 register contains the general enable/disable flags of the external interrupts 0 and 1, the
timer interrupts, and the USART interrupt.
Special Function Register IEN0 (Address A8H)
Reset Value : 00H
Bit No.
A8H
MSB
AF_H
EAL
AE_H
WDT
AD_H
ET2
AC_H AB_H AA_H
ES ET1 EX1
A9_H
ET0
LSB
A8_H
EX0
IEN0
The shaded bit is not used for interrupt control.
Bit
Function
EAL
Enable/disable all interrupts.
If EAL=0, no interrupt will be acknowledged.
If EAL=1, each interrupt source is individually enabled or disabled by setting or
clearing its enable bit.
ET2
Timer 2 overflow / external reload interrupt enable.
If ET2 = 0, the timer 2 interrupt is disabled.
If ET2 = 1, the timer 2 interrupt is enabled.
ES
Serial channel (USART) interrupt enable
If ES = 0, the serial channel interrupt 0 is disabled.
If ES = 1, the serial channel interrupt 0 is enabled.
ET1
Timer 1 overflow interrupt enable.
If ET1 = 0, the timer 1 interrupt is disabled.
If ET1 = 1, the timer 1 interrupt is enabled.
EX1
External interrupt 1 enable.
If EX1 = 0, the external interrupt 1 is disabled.
If EX1 = 1, the external interrupt 1 is enabled.
ET0
Timer 0 overflow interrupt enable.
If ET0 = 0, the timer 0 interrupt is disabled.
If ET0 = 1, the timer 0 interrupt is enabled.
EX0
External interrupt 0 enable.
If EX0 = 0, the external interrupt 0 is disabled.
If EX0 = 1, the external interrupt 0 is disabled.
Semiconductor Group
7-4
1997-08-01