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C515A_9708 Datasheet, PDF (40/182 Pages) Siemens Semiconductor Group – 8-Bit CMOS Microcontroller
External Bus Interface
C515A
4.6 ROM Protection for the C515A
The C515A-4R allows to protect the contents of the internal ROM against unauthorized read out.
The type of ROM protection (protected or unprotected) is fixed with the ROM mask. Therefore, the
customer of a C515A-4R version has to define whether ROM protection has to be selected or not.
The C515A-4R devices, which operate from internal ROM, are always checked for correct ROM
contents during production test. Therefore, unprotected as well as protected ROMs must provide a
procedure to verify the ROM contents. In ROM verification mode 1, which is used to verify
unprotected ROMs, a ROM address is applied externally to the C515A-4R and the ROM data byte
is output at port 0. ROM verification mode 2, which is used to verify ROM protected devices,
operates different : ROM addresses are generated internally and the expected data bytes must be
applied externally to the device (by the manufacturer or by the customer) and are compared
internally with the data bytes from the ROM. After 16 byte verify operations the state of the P3.5 pin
shows whether the last 16 bytes have been verified correctly.
This mechanism provides a very high security of ROM protection. Only the owner of the ROM code
and the manufacturer who know the contents of the ROM can read out and verify it with less effort.
The behaviour of the move code instruction, when the code is executed from the external ROM, is
in such a way that accessing a code byte from a protected on-chip ROM address is not possible. In
this case the byte accessed will be invalid.
4.6.1 Unprotected ROM Mode
If the ROM is unprotected, the ROM verification mode 1 as shown in figure 4-3 is used to read out
the contents of the ROM. The AC timing characteristics of the ROM verification mode is shown in
the AC specifications (chapter 10).
P1.0-P1.7
P2.0-P2.6
Port 0
Address 1
Data 1 Out
Address 2
Data 2 Out
Inputs:
PSEN = V SS
ALE, EA = V IH / V IH2
RESET = V IL2
MCT03255
Figure 4-3
ROM Verification Mode 1
ROM verification mode 1 is selected if the inputs PSEN, ALE, EA, and RESET are put to the
specified logic level. Then the 14-bit address of the internal ROM byte to be read is applied to the
port 1 and port 2 lines. After a delay time, port 0 outputs the content of the addressed ROM cell. In
ROM verification mode 1, the C515A must be provided with a system clock at the XTAL pins and
pullup resistors on the port 0 lines.
Semiconductor Group
4-6
1997-08-01