GS2961A Datasheet, PDF (91/104 Pages) Gennum Corporation – Ancillary data extraction

Table 4-18: Configuration and Status Registers (Continued)
Address Register Name Bit Name
Bit Description
R/W Default
01Ch
01Dh
01Eh
01Fh
020h
021h
022h
VIDEO_FORMAT
_352_B_2
VIDEO_FORMAT
_352_INS_A
VIDEO_FORMAT
_352_INS_B
RASTER_STRUC_
1
RASTER_STRUC_
2
RASTER_STRUC_
3
RASTER_STRUC_
4
VIDEO_FORMAT_4_DS2
15-8 SMPTE 352M embedded packet –
R
0
byte 4 (3G Data Stream 2 only).
VIDEO_FORMAT_3_DS2
7-0 SMPTE 352M embedded packet –
R
0
byte 3 (3G Data Stream 2 only).
VIDEO_FORMAT_2_INS
15-8 SMPTE 352M packet - byte 2 to be
R/W
0
embedded after Level B to Level A
conversion.
VIDEO_FORMAT_1_INS
7-0 SMPTE 352M packet - byte 1 to be
R/W
0
embedded after Level B to Level A
conversion.
VIDEO_FORMAT_4_INS
15-8 SMPTE 352M packet - byte 4 to be
R/W
0
embedded after Level B to Level A
conversion.
VIDEO_FORMAT_3_INS
7-0 SMPTE 352M packet - byte 3 to be
R/W
0
embedded after Level B to Level A
conversion.
RSVD
15-14 Reserved.
R
0
WORDS_PER_ACTLINE
13-0 Words Per Active Line.
R
0
RSVD
15-14 Reserved.
R
0
WORDS_PER_LINE
13-0 Total Words Per Line.
R
0
RSVD
15-11 Reserved.
R
0
LINES_PER_FRAME
10-0 Total Lines Per Frame.
R
0
RATE_SEL_READBACK
15-14
Read back detected data rate:
0 = HD,
1,3=SD,
2=3G
R
0
M
13 Specifies detected M value
R
0
0: 1.000
1: 1.001
Note: In certain systems, due to greater ppm offsets in the crystal, the ‘M’ bit may not assert
properly. In such cases, bits 3:0 in Register 06Fh can be increased to a maximum value of 4.
STD_LOCK
12 Video standard lock.
R
0
INT_PROG
11 Interlaced or progressive.
R
0
ACTLINE_PER_FIELD
10-0 Active lines per frame.
R
0
GS2961A 3Gb/s, HD, SD SDI Integrated Receiver
Data Sheet
54385 - 2
September 2012
91 of 104