English
Language : 

GS2961A Datasheet, PDF (3/104 Pages) Gennum Corporation – Ancillary data extraction
Contents
Key Features ........................................................................................................................................................1
Applications ......................................................................................................................................................... 1
Description ........................................................................................................................................................... 1
Functional Block Diagram ..............................................................................................................................2
1. Pin Out...............................................................................................................................................................7
1.1 Pin Assignment ..................................................................................................................................7
1.2 Pin Descriptions ................................................................................................................................7
2. Electrical Characteristics ......................................................................................................................... 14
2.1 Absolute Maximum Ratings ....................................................................................................... 14
2.2 Recommended Operating Conditions .................................................................................... 14
2.3 DC Electrical Characteristics ..................................................................................................... 15
2.4 AC Electrical Characteristics ..................................................................................................... 17
3. Input/Output Circuits ............................................................................................................................... 22
4. Detailed Description.................................................................................................................................. 26
4.1 Functional Overview .................................................................................................................... 26
4.2 SMPTE 425M Mapping - 3G Level A and Level B Formats ............................................... 27
4.2.1 Level A Mapping................................................................................................................ 27
4.2.2 Level B Mapping ................................................................................................................ 27
4.3 Serial Digital Input ........................................................................................................................ 28
4.3.1 Integrated Adaptive Cable Equalizer.......................................................................... 28
4.4 Serial Digital Loop-Through Output ........................................................................................ 29
4.5 Serial Digital Reclocker ............................................................................................................... 29
4.5.1 PLL Loop Bandwidth ........................................................................................................ 30
4.6 External Crystal/Reference Clock ........................................................................................... 30
4.7 Lock Detect ...................................................................................................................................... 32
4.7.1 Asynchronous Lock .......................................................................................................... 32
4.7.2 Signal Interruption............................................................................................................ 33
4.8 SMPTE Functionality .................................................................................................................... 33
4.8.1 Descrambling and Word Alignment ........................................................................... 33
4.9 Parallel Data Outputs ................................................................................................................... 34
4.9.1 Parallel Data Bus Buffers................................................................................................. 34
4.9.2 Parallel Output in SMPTE Mode ................................................................................... 37
4.9.3 Parallel Output in DVB-ASI Mode ............................................................................... 37
4.9.4 Parallel Output in Data-Through Mode ..................................................................... 38
4.9.5 Parallel Output Clock (PCLK)......................................................................................... 38
4.9.6 DDR Parallel Clock Timing ............................................................................................. 39
4.10 Timing Signal Generator ........................................................................................................... 41
4.10.1 Manual Switch Line Lock Handling.......................................................................... 42
4.10.2 Automatic Switch Line Lock Handling .................................................................... 43
4.10.3 Switch Line Lock Handling During Level B to Level A Conversion ............... 43
4.11 Programmable Multi-function Outputs ............................................................................... 45
4.12 H:V:F Timing Signal Generation ............................................................................................ 46
4.12.1 CEA-861 Timing Generation ....................................................................................... 48
4.13 Automatic Video Standards Detection ................................................................................ 55
GS2961A 3Gb/s, HD, SD SDI Integrated Receiver
Data Sheet
54385 - 2
September 2012
3 of 104