GS2961A Datasheet, PDF (81/104 Pages) Gennum Corporation – Ancillary data extraction

4.20 Host Interface Register Maps
Table 4-18: Configuration and Status Registers
Address Register Name Bit Name
000h
IOPROC_1
RSVD
TRS_WORD_REMAP_DS1
_DISABLE
RSVD
EDH_FLAG_UPDATE
_MASK
EDH_CRC_INS_MASK
H_CONFIG
ANC_DATA_EXT_MASK
RSVD
TIM_861_PIN_DISABLE
TIMING_861
RSVD
ILLEGAL_WORD_REMAP
_DS1_MASK
Bit Description
R/W Default
15 Reserved.
R
0
14 Disables 8-bit TRS word remapping R/W
0
for 3G Level B Data Stream 1, 3G
Level A, HD and SD inputs.
13 Reserved.
R/W
0
12 Disables updating of EDH error
flags.
R/W
0
11 Disables EDH_CRC error correction
R/W
0
and insertion.
10 Selects the H blanking indication:
R/W
0
0: Active line blanking - the H
output is HIGH for all the
horizontal blanking period,
including the EAV and SAV TRS
words.
1: TRS based blanking - the H
output is set HIGH for the entire
horizontal blanking period as
indicated by the H bit in the
received TRS signals.
This signal is only valid when
TIM_861 is set to '0' (via pin or host
interface).
9
Disables ancillary data extraction
R/W
0
FIFO.
8
Reserved.
R/W
0
7
Disable TIM_861 pin control when
R/W
0
set to '1', and use TIMING_861 bit
instead.
6
Selects the output timing reference
R/W
0
format:
0 = Digital FVH timing output;
1 = CEA-861 timing output.
5
Reserved.
R/W
0
4
Disables illegal word remapping
R/W
0
for 3G Level B Data Stream 1, 3G
Level A, HD and SD inputs.
GS2961A 3Gb/s, HD, SD SDI Integrated Receiver
Data Sheet
54385 - 2
September 2012
81 of 104