GS2961A Datasheet, PDF (31/104 Pages) Gennum Corporation – Ancillary data extraction

External Crystal Connection
16pF
K6 _XTAL1
External Clock Source Connection
External
Clock
K6 _XTAL1
16pF
J6
XTAL2
NC
J6 _XTAL2
Notes:
1. Capacitor values listed represent the total capacitance,
including discrete capacitance and parasitic board capacitance.
2.XTAL1 serves as an input, which may alternatively accept a 27MHz clock
source.
Figure 4-4:27MHz Clock Sources
Table 4-3: Input Clock Requirements
Parameter
Min
Typ
Max
UOM
Notes
XTAL1 Low Level Input Voltage
−
(V_il)
−
20% of VDD_IO
V
3
XTAL1 High Level Input
80% of VDDIO
−
Voltage (V_ih)
−
V
3
XTAL1 Input Slew Rate
2
−
−
V/ns
3
XTAL1 to XOUT Prop. Delay
1.3
1.5
2.3
ns
3
(High to Low)
XTAL1 to XOUT Prop. Delay
1.3
1.6
2.3
ns
3
(Low to High)
NOTES:
Valid when the cell is used to buffer an external clock source which is connected to the XTAL1 pin, then nothing should be
connected to the XTAL2 pin.
GS2961A 3Gb/s, HD, SD SDI Integrated Receiver
Data Sheet
54385 - 2
September 2012
31 of 104