GS2961A Datasheet, PDF (71/104 Pages) Gennum Corporation – Ancillary data extraction

4.18.1 TRS Correction & Insertion
When TRS Error Correction and Insertion is enabled, the GS2961A generates and
overwrites TRS code words as required.
TRS Word Generation and Insertion is performed using the timing generated by the
Timing Signal Generator, providing an element of noise immunity over using just the
received TRS information.
This feature is enabled when the IOPROC_EN/DIS pin is HIGH and the
TRS_INS_DISABLE bit in the IOPROC_DISABLE register is set LOW.
NOTE: Inserted TRS code words are always 10-bit compliant, irrespective of the bit
depth of the incoming video stream.
4.18.2 Line Based CRC Correction & Insertion
When CRC Error Correction and Insertion is enabled, the GS2961A generates and
inserts line based CRC words into both the Y and C channels of the data stream.
Line based CRC word generation and insertion only occurs in HD and 3G modes, and is
enabled in when the IOPROC_EN/DIS pin is HIGH and the CRC_INS_DSX_MASK bit in
the IOPROC_X register is set LOW.
4.18.3 Line Number Error Correction & Insertion
When Line Number Error Correction and Insertion is enabled, the GS2961A calculates
and inserts line numbers into the output data stream. Re-calculated line numbers are
inserted into both the Y and C channels.
Line number generation is in accordance with the relevant HD or 3G video standard as
determined by the Automatic Standards Detection block.
This feature is enabled when the device is operating in HD or 3G modes, the
IOPROC_EN/DIS pin is HIGH and the LNUM_INS_DSX_MASK bit in the IOPROC_X
register is set LOW.
4.18.4 ANC Data Checksum Error Correction & Insertion
When ANC data Checksum Error Correction and Insertion is enabled, the GS2961A
generates and inserts ancillary data checksums for all ancillary data words by default.
Where user specified ancillary data has been programmed (see Section 4.17.1), only the
checksums for the programmed ancillary data are corrected.
This feature is enabled when the IOPROC_EN/DIS pin is HIGH and the
ANC_CHECKSUM_INSERTION_DSX_MASK bit in the IOPROC_X register is set LOW.
4.18.5 EDH CRC Correction & Insertion
When EDH CRC Error Correction and Insertion is enabled, the GS2961A generates and
overwrites full field and active picture CRC check-words.
GS2961A 3Gb/s, HD, SD SDI Integrated Receiver
Data Sheet
54385 - 2
September 2012
71 of 104